qcom,msm8917-pinctrl.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8917-pinctrl.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Qualcomm MSM8917 TLMM pin controller
  8
  9maintainers:
 10  - Barnabas Czeman <barnabas.czeman@mainlining.org>
 11
 12description:
 13  Top Level Mode Multiplexer pin controller in Qualcomm MSM8917 SoC.
 14
 15properties:
 16  compatible:
 17    const: qcom,msm8917-pinctrl
 18
 19  reg:
 20    maxItems: 1
 21
 22  interrupts:
 23    maxItems: 1
 24
 25  gpio-reserved-ranges:
 26    minItems: 1
 27    maxItems: 66
 28
 29  gpio-line-names:
 30    maxItems: 134
 31
 32patternProperties:
 33  "-state$":
 34    oneOf:
 35      - $ref: "#/$defs/qcom-msm8917-tlmm-state"
 36      - patternProperties:
 37          "-pins$":
 38            $ref: "#/$defs/qcom-msm8917-tlmm-state"
 39        additionalProperties: false
 40
 41$defs:
 42  qcom-msm8917-tlmm-state:
 43    type: object
 44    description:
 45      Pinctrl node's client devices use subnodes for desired pin configuration.
 46      Client device subnodes use below standard properties.
 47    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
 48    unevaluatedProperties: false
 49
 50    properties:
 51      pins:
 52        description:
 53          List of gpio pins affected by the properties specified in this
 54          subnode.
 55        items:
 56          oneOf:
 57            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-3])$"
 58            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
 59                      sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0,
 60                      qdsd_data1, qdsd_data2, qdsd_data3 ]
 61        minItems: 1
 62        maxItems: 16
 63
 64      function:
 65        description:
 66          Specify the alternative function to be configured for the specified
 67          pins.
 68
 69        enum: [ accel_int, adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1,
 70                atest_char, atest_char0, atest_char1, atest_char2,
 71                atest_char3, atest_combodac_to_gpio_native,
 72                atest_gpsadc_dtest0_native, atest_gpsadc_dtest1_native,
 73                atest_tsens, atest_wlan0, atest_wlan1, audio_ref,
 74                audio_reset, bimc_dte0, bimc_dte1, blsp6_spi, blsp8_spi,
 75                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5,
 76                blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_spi1, blsp_spi2,
 77                blsp_spi3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7,
 78                blsp_spi8, blsp_uart1, blsp_uart2, blsp_uart3, blsp_uart4,
 79                blsp_uart5, blsp_uart6, blsp_uart7, blsp_uart8, cam0_ldo,
 80                cam1_rst, cam1_standby, cam2_rst, cam2_standby, cam_mclk,
 81                cci_async, cci_i2c, cci_timer0, cci_timer1, cdc_pdm0,
 82                codec_int1, codec_int2, codec_mad, coex_uart, cri_trng,
 83                cri_trng0, cri_trng1, dbg_out, dmic0_clk, dmic0_data,
 84                ebi_cdc, ebi_ch0, ext_lpass, forced_usb, fp_gpio, fp_int,
 85                gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b,
 86                gcc_gp3_clk_a, gcc_gp3_clk_b, gcc_plltest, gcc_tlmm, gpio,
 87                gsm0_tx, key_focus, key_snapshot, key_volp, ldo_en,
 88                ldo_update, lpass_slimbus, lpass_slimbus0, lpass_slimbus1,
 89                m_voc, mag_int, mdp_vsync, mipi_dsi0, modem_tsync, nav_pps,
 90                nav_pps_in_a, nav_pps_in_b, nav_tsync, nfc_pwr, ov_ldo,
 91                pa_indicator, pbs0, pbs1, pbs2, pri_mi2s, pri_mi2s_mclk_a,
 92                pri_mi2s_mclk_b, pri_mi2s_ws, prng_rosc,
 93                pwr_crypto_enabled_a, pwr_crypto_enabled_b,
 94                pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,
 95                pwr_nav_enabled_b, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
 96                qdss_cti_trig_in_b0, qdss_cti_trig_in_b1,
 97                qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,
 98                qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a,
 99                qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,
100                qdss_tracedata_a, qdss_tracedata_b, sd_write, sdcard_det,
101                sec_mi2s, sec_mi2s_mclk_a, sec_mi2s_mclk_b, sensor_rst,
102                smb_int, ssbi_wtr1, ts_resout, ts_sample, uim1_clk,
103                uim1_data, uim1_present, uim1_reset, uim2_clk, uim2_data,
104                uim2_present, uim2_reset, uim_batt, us_emitter, us_euro,
105                wcss_bt, wcss_fm, wcss_wlan, wcss_wlan0, wcss_wlan1,
106                wcss_wlan2, webcam_rst, webcam_standby, wsa_io, wsa_irq ]
107
108    required:
109      - pins
110
111allOf:
112  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
113
114required:
115  - compatible
116  - reg
117
118unevaluatedProperties: false
119
120examples:
121  - |
122    #include <dt-bindings/interrupt-controller/arm-gic.h>
123
124    tlmm: pinctrl@1000000 {
125        compatible = "qcom,msm8917-pinctrl";
126        reg = <0x01000000 0x300000>;
127        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
128        gpio-controller;
129        gpio-ranges = <&tlmm 0 0 134>;
130        #gpio-cells = <2>;
131        interrupt-controller;
132        #interrupt-cells = <2>;
133
134        blsp1-uart2-sleep-state {
135            pins = "gpio4", "gpio5";
136            function = "gpio";
137
138            drive-strength = <2>;
139            bias-pull-down;
140        };
141
142        spi1-default-state {
143            spi-pins {
144                pins = "gpio0", "gpio1", "gpio3";
145                function = "blsp_spi1";
146
147                drive-strength = <12>;
148                bias-disable;
149            };
150
151            cs-pins {
152                pins = "gpio2";
153                function = "gpio";
154
155                drive-strength = <16>;
156                bias-disable;
157                output-high;
158            };
159        };
160    };