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mediatek,mt7988-pinctrl.yaml
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linux-6.19.14/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7988-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek MT7988 Pin Controller 8 9maintainers: 10 - Sean Wang <sean.wang@kernel.org> 11 12description: 13 The MediaTek's MT7988 Pin controller is used to control SoC pins. 14 15properties: 16 compatible: 17 enum: 18 - mediatek,mt7988-pinctrl 19 20 reg: 21 minItems: 7 22 maxItems: 7 23 24 reg-names: 25 items: 26 - const: gpio 27 - const: iocfg_tr 28 - const: iocfg_br 29 - const: iocfg_rb 30 - const: iocfg_lb 31 - const: iocfg_tl 32 - const: eint 33 34 gpio-controller: true 35 36 "#gpio-cells": 37 const: 2 38 39 gpio-ranges: 40 minItems: 1 41 maxItems: 5 42 description: 43 GPIO valid number range. 44 45 interrupt-controller: true 46 47 interrupts: 48 maxItems: 1 49 50 "#interrupt-cells": 51 const: 2 52 53allOf: 54 - $ref: pinctrl.yaml# 55 56required: 57 - compatible 58 - reg 59 - reg-names 60 - gpio-controller 61 - "#gpio-cells" 62 63patternProperties: 64 "-hog(-[0-9]+)?$": 65 type: object 66 required: 67 - gpio-hog 68 69 '-pins$': 70 type: object 71 additionalProperties: false 72 73 properties: 74 mux: 75 type: object 76 additionalProperties: false 77 $ref: /schemas/pinctrl/pinmux-node.yaml 78 description: | 79 pinmux configuration nodes. 80 81 The following table shows the effective values of "group", "function" 82 properties and chip pinout pins 83 84 groups function pins (in pin#) 85 --------------------------------------------------------------------- 86 "tops_jtag0_0" "jtag" 0, 1, 2, 3, 4 87 "wo0_jtag" "jtag" 50, 51, 52, 53, 54 88 "wo1_jtag" "jtag" 50, 51, 52, 53, 54 89 "wo2_jtag" "jtag" 50, 51, 52, 53, 54 90 "jtag" "jtag" 58, 59, 60, 61, 62 91 "tops_jtag0_1" "jtag" 58, 59, 60, 61, 62 92 "int_usxgmii" "int_usxgmii" 2, 3 93 "pwm0" "pwm" 57 94 "pwm1" "pwm" 21 95 "pwm2" "pwm" 80 96 "pwm2_0" "pwm" 58 97 "pwm3" "pwm" 81 98 "pwm3_0" "pwm" 59 99 "pwm4" "pwm" 82 100 "pwm4_0" "pwm" 60 101 "pwm5" "pwm" 83 102 "pwm5_0" "pwm" 61 103 "pwm6" "pwm" 69 104 "pwm6_0" "pwm" 62 105 "pwm7" "pwm" 70 106 "pwm7_0" "pwm" 4 107 "dfd" "dfd" 0, 1, 2, 3, 4 108 "xfi_phy0_i2c0" "i2c" 0, 1 109 "xfi_phy1_i2c0" "i2c" 0, 1 110 "xfi_phy_pll_i2c0" "i2c" 3, 4 111 "xfi_phy_pll_i2c1" "i2c" 3, 4 112 "i2c0_0" "i2c" 5, 6 113 "i2c1_sfp" "i2c" 5, 6 114 "xfi_pextp_phy0_i2c" "i2c" 5, 6 115 "xfi_pextp_phy1_i2c" "i2c" 5, 6 116 "i2c0_1" "i2c" 15, 16 117 "u30_phy_i2c0" "i2c" 15, 16 118 "u32_phy_i2c0" "i2c" 15, 16 119 "xfi_phy0_i2c1" "i2c" 15, 16 120 "xfi_phy1_i2c1" "i2c" 15, 16 121 "xfi_phy_pll_i2c2" "i2c" 15, 16 122 "i2c1_0" "i2c" 17, 18 123 "u30_phy_i2c1" "i2c" 17, 18 124 "u32_phy_i2c1" "i2c" 17, 18 125 "xfi_phy_pll_i2c3" "i2c" 17, 18 126 "sgmii0_i2c" "i2c" 17, 18 127 "sgmii1_i2c" "i2c" 17, 18 128 "i2c1_2" "i2c" 69, 70 129 "i2c2_0" "i2c" 69, 70 130 "i2c2_1" "i2c" 71, 72 131 "mdc_mdio0" "eth" 5, 6 132 "2p5g_ext_mdio" "eth" 28, 29 133 "gbe_ext_mdio" "eth" 30, 31 134 "mdc_mdio1" "eth" 69, 70 135 "pcie_wake_n0_0" "pcie" 7 136 "pcie_clk_req_n0_0" "pcie" 8 137 "pcie_wake_n3_0" "pcie" 9 138 "pcie_clk_req_n3" "pcie" 10 139 "pcie_clk_req_n0_1" "pcie" 10 140 "pcie_p0_phy_i2c" "pcie" 7, 8 141 "pcie_p1_phy_i2c" "pcie" 7, 8 142 "pcie_p3_phy_i2c" "pcie" 9, 10 143 "pcie_p2_phy_i2c" "pcie" 7, 8 144 "ckm_phy_i2c" "pcie" 9, 10 145 "pcie_wake_n0_1" "pcie" 13 146 "pcie_wake_n3_1" "pcie" 14 147 "pcie_2l_0_pereset" "pcie" 19 148 "pcie_1l_1_pereset" "pcie" 20 149 "pcie_clk_req_n2_1" "pcie" 63 150 "pcie_2l_1_pereset" "pcie" 73 151 "pcie_1l_0_pereset" "pcie" 74 152 "pcie_wake_n1_0" "pcie" 75 153 "pcie_clk_req_n1" "pcie" 76 154 "pcie_wake_n2_0" "pcie" 77 155 "pcie_clk_req_n2_0" "pcie" 78 156 "pcie_wake_n2_1" "pcie" 79 157 "pmic" "pmic" 11 158 "watchdog" "watchdog" 12 159 "spi0_wp_hold" "spi" 22, 23 160 "spi0" "spi" 24, 25, 26, 27 161 "spi1" "spi" 28, 29, 30, 31 162 "spi2" "spi" 32, 33, 34, 35 163 "spi2_wp_hold" "spi" 36, 37 164 "snfi" "flash" 22, 23, 24, 25, 26, 27 165 "emmc_45" "flash" 21, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37 166 "sdcard" "flash" 32, 33, 34, 35, 36, 37 167 "emmc_51" "flash" 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49 168 "uart2" "uart" 0, 1, 2, 3 169 "tops_uart0_0" "uart" 22, 23 170 "uart2_0" "uart" 28, 29, 30, 31 171 "uart1_0" "uart" 32, 33, 34, 35 172 "uart2_1" "uart" 32, 33, 34, 35 173 "net_wo0_uart_txd_0" "uart" 28 174 "net_wo1_uart_txd_0" "uart" 29 175 "net_wo2_uart_txd_0" "uart" 30 176 "tops_uart1_0" "uart" 28, 29 177 "tops_uart0_1" "uart" 30, 31 178 "tops_uart1_1" "uart" 36, 37 179 "uart0" "uart" 55, 56 180 "tops_uart0_2" "uart" 55, 56 181 "uart2_2" "uart" 50, 51, 52, 53 182 "uart1_1" "uart" 58, 59, 60, 61 183 "uart2_3" "uart" 58, 59, 60, 61 184 "uart1_2" "uart" 80, 81, 82, 83 185 "uart1_2_lite" "uart" 80, 81 186 "tops_uart1_2" "uart" 80, 81 187 "net_wo0_uart_txd_1" "uart" 80 188 "net_wo1_uart_txd_1" "uart" 81 189 "net_wo2_uart_txd_1" "uart" 82 190 "udi" "udi" 32, 33, 34, 35, 36 191 "i2s" "audio" 50, 51, 52, 53, 54 192 "pcm" "audio" 50, 51, 52, 53 193 "gbe0_led1" "led" 58 194 "gbe1_led1" "led" 59 195 "gbe2_led1" "led" 60 196 "gbe3_led1" "led" 61 197 "2p5gbe_led1" "led" 62 198 "gbe0_led0" "led" 64 199 "gbe1_led0" "led" 65 200 "gbe2_led0" "led" 66 201 "gbe3_led0" "led" 67 202 "2p5gbe_led0" "led" 68 203 "drv_vbus_p1" "usb" 63 204 "drv_vbus" "usb" 79 205 206 properties: 207 function: 208 description: 209 A string containing the name of the function to mux to the group. 210 enum: [audio, dfd, eth, flash, i2c, int_usxgmii, jtag, led, pcie, pmic, pwm, spi, 211 uart, udi, usb, watchdog] 212 groups: 213 description: 214 An array of strings. Each string contains the name of a group. 215 216 required: 217 - function 218 - groups 219 220 allOf: 221 - if: 222 properties: 223 function: 224 const: audio 225 then: 226 properties: 227 groups: 228 enum: [i2s, pcm] 229 - if: 230 properties: 231 function: 232 const: jtag 233 then: 234 properties: 235 groups: 236 enum: [jtag, tops_jtag0_0, tops_jtag0_1, wo0_jtag, wo1_jtag, wo2_jtag] 237 - if: 238 properties: 239 function: 240 const: int_usxgmii 241 then: 242 properties: 243 groups: 244 const: int_usxgmii 245 - if: 246 properties: 247 function: 248 const: dfd 249 then: 250 properties: 251 groups: 252 const: dfd 253 - if: 254 properties: 255 function: 256 const: flash 257 then: 258 properties: 259 groups: 260 enum: [emmc_45, emmc_51, sdcard, snfi] 261 - if: 262 properties: 263 function: 264 const: eth 265 then: 266 properties: 267 groups: 268 enum: [2p5g_ext_mdio, gbe_ext_mdio, mdc_mdio0, mdc_mdio1] 269 - if: 270 properties: 271 function: 272 const: i2c 273 then: 274 properties: 275 groups: 276 enum: [xfi_phy0_i2c0, xfi_phy1_i2c0, xfi_phy_pll_i2c0, 277 xfi_phy_pll_i2c1, i2c0_0, i2c1_sfp, xfi_pextp_phy0_i2c, 278 xfi_pextp_phy1_i2c, i2c0_1, u30_phy_i2c0, u32_phy_i2c0, 279 xfi_phy0_i2c1, xfi_phy1_i2c1, xfi_phy_pll_i2c2, i2c1_0, 280 u30_phy_i2c1, u32_phy_i2c1, xfi_phy_pll_i2c3, sgmii0_i2c, 281 sgmii1_i2c, i2c1_2, i2c2_0, i2c2_1] 282 - if: 283 properties: 284 function: 285 const: led 286 then: 287 properties: 288 groups: 289 enum: [2p5gbe_led0, 2p5gbe_led1, gbe0_led0, gbe0_led1, gbe1_led0, gbe1_led1, 290 gbe2_led0, gbe2_led1, gbe3_led0, gbe3_led1, wf5g_led0, wf5g_led1] 291 - if: 292 properties: 293 function: 294 const: pcie 295 then: 296 properties: 297 groups: 298 items: 299 enum: [pcie_wake_n0_0, pcie_clk_req_n0_0, pcie_wake_n3_0, 300 pcie_clk_req_n3, pcie_p0_phy_i2c, pcie_p1_phy_i2c, 301 pcie_p3_phy_i2c, pcie_p2_phy_i2c, ckm_phy_i2c, 302 pcie_wake_n0_1, pcie_wake_n3_1, pcie_2l_0_pereset, 303 pcie_1l_1_pereset, pcie_clk_req_n2_1, pcie_2l_1_pereset, 304 pcie_1l_0_pereset, pcie_wake_n1_0, pcie_clk_req_n1, 305 pcie_wake_n2_0, pcie_clk_req_n2_0, pcie_wake_n2_1, 306 pcie_clk_req_n0_1] 307 maxItems: 3 308 - if: 309 properties: 310 function: 311 const: pmic 312 then: 313 properties: 314 groups: 315 const: pmic 316 - if: 317 properties: 318 function: 319 const: pwm 320 then: 321 properties: 322 groups: 323 items: 324 enum: [pwm0, pwm1, pwm2, pwm2_0, pwm3, pwm3_0, pwm4, pwm4_0, pwm5, pwm5_0, 325 pwm6, pwm6_0, pwm7, pwm7_0] 326 maxItems: 2 327 - if: 328 properties: 329 function: 330 const: spi 331 then: 332 properties: 333 groups: 334 items: 335 enum: [spi0, spi0_wp_hold, spi1, spi2, spi2_wp_hold] 336 maxItems: 2 337 - if: 338 properties: 339 function: 340 const: uart 341 then: 342 properties: 343 groups: 344 items: 345 enum: [net_wo0_uart_txd_0, net_wo0_uart_txd_1, net_wo1_uart_txd_0, 346 net_wo1_uart_txd_1, net_wo2_uart_txd_0, net_wo2_uart_txd_1, 347 tops_uart0_0, tops_uart0_1, tops_uart0_2, tops_uart1_0, 348 tops_uart1_1, tops_uart1_2, uart0, uart1_0, uart1_1, uart1_2, 349 uart1_2_lite, uart2, uart2_0, uart2_1, uart2_3] 350 maxItems: 2 351 - if: 352 properties: 353 function: 354 const: watchdog 355 then: 356 properties: 357 groups: 358 const: watchdog 359 - if: 360 properties: 361 function: 362 const: udi 363 then: 364 properties: 365 groups: 366 const: udi 367 - if: 368 properties: 369 function: 370 const: usb 371 then: 372 properties: 373 groups: 374 items: 375 enum: [drv_vbus, drv_vbus_p1] 376 maxItems: 1 377 378 patternProperties: 379 '^conf(-[-a-z]*)?$': 380 type: object 381 additionalProperties: false 382 description: 383 pinconf configuration nodes. 384 $ref: /schemas/pinctrl/pincfg-node.yaml 385 386 properties: 387 pins: 388 description: 389 An array of strings. Each string contains the name of a pin. 390 items: 391 enum: [UART2_RXD, UART2_TXD, UART2_CTS, UART2_RTS, GPIO_A, SMI_0_MDC, 392 SMI_0_MDIO, PCIE30_2L_0_WAKE_N, PCIE30_2L_0_CLKREQ_N, 393 PCIE30_1L_1_WAKE_N, PCIE30_1L_1_CLKREQ_N, GPIO_P, WATCHDOG, 394 GPIO_RESET, GPIO_WPS, PMIC_I2C_SCL, PMIC_I2C_SDA, I2C_1_SCL, 395 I2C_1_SDA, PCIE30_2L_0_PRESET_N, PCIE30_1L_1_PRESET_N, PWMD1, 396 SPI0_WP, SPI0_HOLD, SPI0_CSB, SPI0_MISO, SPI0_MOSI, SPI0_CLK, 397 SPI1_CSB, SPI1_MISO, SPI1_MOSI, SPI1_CLK, SPI2_CLK, SPI2_MOSI, 398 SPI2_MISO, SPI2_CSB, SPI2_HOLD, SPI2_WP, EMMC_RSTB, EMMC_DSL, 399 EMMC_CK, EMMC_CMD, EMMC_DATA_7, EMMC_DATA_6, EMMC_DATA_5, 400 EMMC_DATA_4, EMMC_DATA_3, EMMC_DATA_2, EMMC_DATA_1, 401 EMMC_DATA_0, PCM_FS_I2S_LRCK, PCM_CLK_I2S_BCLK, 402 PCM_DRX_I2S_DIN, PCM_DTX_I2S_DOUT, PCM_MCK_I2S_MCLK, 403 UART0_RXD, UART0_TXD, PWMD0, JTAG_JTDI, JTAG_JTDO, JTAG_JTMS, 404 JTAG_JTCLK, JTAG_JTRST_N, USB_DRV_VBUS_P1, LED_A, LED_B, LED_C, 405 LED_D, LED_E, GPIO_B, GPIO_C, I2C_2_SCL, I2C_2_SDA, 406 PCIE30_2L_1_PRESET_N, PCIE30_1L_0_PRESET_N, 407 PCIE30_2L_1_WAKE_N, PCIE30_2L_1_CLKREQ_N, 408 PCIE30_1L_0_WAKE_N, PCIE30_1L_0_CLKREQ_N, USB_DRV_VBUS_P0, 409 UART1_RXD, UART1_TXD, UART1_CTS, UART1_RTS] 410 maxItems: 84 411 412 bias-disable: true 413 414 bias-pull-up: 415 oneOf: 416 - type: boolean 417 description: normal pull up. 418 - enum: [100, 101, 102, 103] 419 description: 420 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 421 dt-bindings/pinctrl/mt65xx.h. 422 423 bias-pull-down: 424 oneOf: 425 - type: boolean 426 description: normal pull down. 427 - enum: [100, 101, 102, 103] 428 description: 429 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 430 dt-bindings/pinctrl/mt65xx.h. 431 432 input-enable: true 433 434 input-disable: true 435 436 output-enable: true 437 438 output-low: true 439 440 output-high: true 441 442 input-schmitt-enable: true 443 444 input-schmitt-disable: true 445 446 drive-strength: 447 enum: [2, 4, 6, 8, 10, 12, 14, 16] 448 449 mediatek,pull-up-adv: 450 description: | 451 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 452 Pull up settings for 2 pull resistors, R0 and R1. Valid arguments 453 are described as below: 454 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 455 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 456 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 457 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 458 $ref: /schemas/types.yaml#/definitions/uint32 459 enum: [0, 1, 2, 3] 460 461 mediatek,pull-down-adv: 462 description: | 463 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 464 Pull down settings for 2 pull resistors, R0 and R1. Valid arguments 465 are described as below: 466 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 467 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 468 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 469 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 470 $ref: /schemas/types.yaml#/definitions/uint32 471 enum: [0, 1, 2, 3] 472 473 required: 474 - pins 475 476additionalProperties: false 477 478examples: 479 - | 480 #include <dt-bindings/interrupt-controller/irq.h> 481 #include <dt-bindings/interrupt-controller/arm-gic.h> 482 #include <dt-bindings/pinctrl/mt65xx.h> 483 484 soc { 485 #address-cells = <2>; 486 #size-cells = <2>; 487 488 pio: pinctrl@1001f000 { 489 compatible = "mediatek,mt7988-pinctrl"; 490 reg = <0 0x1001f000 0 0x1000>, 491 <0 0x11c10000 0 0x1000>, 492 <0 0x11d00000 0 0x1000>, 493 <0 0x11d20000 0 0x1000>, 494 <0 0x11e00000 0 0x1000>, 495 <0 0x11f00000 0 0x1000>, 496 <0 0x1000b000 0 0x1000>; 497 reg-names = "gpio", "iocfg_tr", 498 "iocfg_br", "iocfg_rb", 499 "iocfg_lb", "iocfg_tl", "eint"; 500 gpio-controller; 501 #gpio-cells = <2>; 502 gpio-ranges = <&pio 0 0 84>; 503 interrupt-controller; 504 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 505 interrupt-parent = <&gic>; 506 #interrupt-cells = <2>; 507 508 i2c0_pins: i2c0-g0-pins { 509 mux { 510 function = "i2c"; 511 groups = "i2c0_1"; 512 }; 513 }; 514 515 mdio0_pins: mdio0-pins { 516 mux { 517 function = "eth"; 518 groups = "mdc_mdio0"; 519 }; 520 521 conf { 522 pins = "SMI_0_MDC", "SMI_0_MDIO"; 523 drive-strength = <8>; 524 }; 525 }; 526 527 mmc0_pins_emmc_51: mmc0-emmc-51-pins { 528 mux { 529 function = "flash"; 530 groups = "emmc_51"; 531 }; 532 }; 533 534 mmc0_pins_sdcard: mmc0-sdcard-pins { 535 mux { 536 function = "flash"; 537 groups = "sdcard"; 538 }; 539 }; 540 541 pcie0_pins: pcie0-pins { 542 mux { 543 function = "pcie"; 544 groups = "pcie_2l_0_pereset", "pcie_clk_req_n0_0", 545 "pcie_wake_n0_0"; 546 }; 547 }; 548 549 pcie1_pins: pcie1-pins { 550 mux { 551 function = "pcie"; 552 groups = "pcie_2l_1_pereset", "pcie_clk_req_n1", 553 "pcie_wake_n1_0"; 554 }; 555 }; 556 557 pcie2_pins: pcie2-pins { 558 mux { 559 function = "pcie"; 560 groups = "pcie_1l_0_pereset", "pcie_clk_req_n2_0", 561 "pcie_wake_n2_0"; 562 }; 563 }; 564 565 pcie3_pins: pcie3-pins { 566 mux { 567 function = "pcie"; 568 groups = "pcie_1l_1_pereset", "pcie_clk_req_n3", 569 "pcie_wake_n3_0"; 570 }; 571 }; 572 573 uart0_pins: uart0-pins { 574 mux { 575 function = "uart"; 576 groups = "uart0"; 577 }; 578 }; 579 }; 580 };
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