fsl,imx7d-pinctrl.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/pinctrl/fsl,imx7d-pinctrl.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale IMX7D IOMUX Controller
  8
  9maintainers:
 10  - Dong Aisheng <aisheng.dong@nxp.com>
 11
 12description:
 13  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
 14  for common binding part and usage.
 15
 16properties:
 17  compatible:
 18    oneOf:
 19      - enum:
 20          - fsl,imx7d-iomuxc
 21          - fsl,imx7d-iomuxc-lpsr
 22
 23  reg:
 24    maxItems: 1
 25
 26  fsl,input-sel:
 27    description:
 28      phandle for main iomuxc controller which shares the input select
 29      register for daisy chain settings.
 30    $ref: /schemas/types.yaml#/definitions/phandle
 31
 32# Client device subnode's properties
 33patternProperties:
 34  'grp$':
 35    type: object
 36    description:
 37      Pinctrl node's client devices use subnodes for desired pin configuration.
 38      Client device subnodes use below standard properties.
 39
 40    properties:
 41      fsl,pins:
 42        description:
 43          each entry consists of 6 integers and represents the mux and config
 44          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
 45          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
 46          be found in <arch/arm/boot/dts/imx7d-pinfunc.h>. The last integer
 47          CONFIG is the pad setting value like pull-up on this pin. Please
 48          refer to i.MX7D Reference Manual for detailed CONFIG settings.
 49        $ref: /schemas/types.yaml#/definitions/uint32-matrix
 50        items:
 51          items:
 52            - description: |
 53                "mux_reg" indicates the offset of mux register.
 54            - description: |
 55                "conf_reg" indicates the offset of pad configuration register.
 56            - description: |
 57                "input_reg" indicates the offset of select input register.
 58            - description: |
 59                "mux_val" indicates the mux value to be applied.
 60            - description: |
 61                "input_val" indicates the select input value to be applied.
 62            - description: |
 63                "pad_setting" indicates the pad configuration value to be applied.
 64
 65    required:
 66      - fsl,pins
 67
 68    additionalProperties: false
 69
 70allOf:
 71  - $ref: pinctrl.yaml#
 72
 73required:
 74  - compatible
 75  - reg
 76
 77if:
 78  properties:
 79    compatible:
 80      contains:
 81        enum:
 82          - fsl,imx7d-iomuxc-lpsr
 83
 84then:
 85  required:
 86    - fsl,input-sel
 87
 88additionalProperties: false
 89
 90examples:
 91  - |
 92    iomuxc: pinctrl@30330000 {
 93      compatible = "fsl,imx7d-iomuxc";
 94      reg = <0x30330000 0x10000>;
 95
 96      pinctrl_uart5: uart5grp {
 97        fsl,pins =
 98          <0x0160 0x03D0 0x0714 0x1 0x0	0x7e>,
 99          <0x0164 0x03D4 0x0000 0x1 0x0	0x76>;
100      };
101    };
102  - |
103    iomuxc_lpsr: pinctrl@302c0000 {
104      compatible = "fsl,imx7d-iomuxc-lpsr";
105      reg = <0x302c0000 0x10000>;
106      fsl,input-sel = <&iomuxc>;
107
108      pinctrl_gpio_lpsr: gpio1-grp {
109          fsl,pins =
110            <0x0008 0x0038 0x0000 0x0 0x0	0x59>,
111            <0x000C 0x003C 0x0000 0x0 0x0	0x59>;
112        };
113    };