socionext,uniphier-usb3ss-phy.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Socionext UniPhier USB3 Super-Speed (SS) PHY
  8
  9description: |
 10  This describes the devicetree bindings for PHY interfaces built into
 11  USB3 controller implemented on Socionext UniPhier SoCs.
 12  Although the controller includes High-Speed PHY and Super-Speed PHY,
 13  this describes about Super-Speed PHY.
 14
 15maintainers:
 16  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
 17
 18properties:
 19  compatible:
 20    enum:
 21      - socionext,uniphier-pro4-usb3-ssphy
 22      - socionext,uniphier-pro5-usb3-ssphy
 23      - socionext,uniphier-pxs2-usb3-ssphy
 24      - socionext,uniphier-ld20-usb3-ssphy
 25      - socionext,uniphier-pxs3-usb3-ssphy
 26      - socionext,uniphier-nx1-usb3-ssphy
 27
 28  reg:
 29    maxItems: 1
 30
 31  "#phy-cells":
 32    const: 0
 33
 34  clocks:
 35    minItems: 2
 36    maxItems: 3
 37
 38  clock-names:
 39    minItems: 2
 40    maxItems: 3
 41
 42  resets:
 43    maxItems: 2
 44
 45  reset-names:
 46    maxItems: 2
 47
 48  vbus-supply:
 49    description: A phandle to the regulator for USB VBUS, only for USB host
 50
 51allOf:
 52  - if:
 53      properties:
 54        compatible:
 55          contains:
 56            enum:
 57              - socionext,uniphier-pro4-usb3-ssphy
 58              - socionext,uniphier-pro5-usb3-ssphy
 59    then:
 60      properties:
 61        clocks:
 62          minItems: 2
 63          maxItems: 2
 64        clock-names:
 65          items:
 66            - const: gio
 67            - const: link
 68        resets:
 69          minItems: 2
 70          maxItems: 2
 71        reset-names:
 72          items:
 73            - const: gio
 74            - const: link
 75  - if:
 76      properties:
 77        compatible:
 78          contains:
 79            enum:
 80              - socionext,uniphier-pxs2-usb3-ssphy
 81              - socionext,uniphier-ld20-usb3-ssphy
 82    then:
 83      properties:
 84        clocks:
 85          minItems: 2
 86          maxItems: 2
 87        clock-names:
 88          items:
 89            - const: link
 90            - const: phy
 91        resets:
 92          minItems: 2
 93          maxItems: 2
 94        reset-names:
 95          items:
 96            - const: link
 97            - const: phy
 98  - if:
 99      properties:
100        compatible:
101          contains:
102            enum:
103              - socionext,uniphier-pxs3-usb3-ssphy
104              - socionext,uniphier-nx1-usb3-ssphy
105    then:
106      properties:
107        clocks:
108          minItems: 2
109          maxItems: 3
110        clock-names:
111          minItems: 2
112          items:
113            - const: link
114            - const: phy
115            - const: phy-ext
116        resets:
117          minItems: 2
118          maxItems: 2
119        reset-names:
120          items:
121            - const: link
122            - const: phy
123
124required:
125  - compatible
126  - reg
127  - "#phy-cells"
128  - clocks
129  - clock-names
130  - resets
131  - reset-names
132
133additionalProperties: false
134
135examples:
136  - |
137    usb_ssphy0: phy@300 {
138        compatible = "socionext,uniphier-ld20-usb3-ssphy";
139        reg = <0x300 0x10>;
140        #phy-cells = <0>;
141        clock-names = "link", "phy";
142        clocks = <&sys_clk 14>, <&sys_clk 16>;
143        reset-names = "link", "phy";
144        resets = <&sys_rst 14>, <&sys_rst 16>;
145        vbus-supply = <&usb_vbus0>;
146    };