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microchip,sparx5-serdes.yaml

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linux-6.19.14/Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml YAML
  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Microchip Sparx5 Serdes controller
  8
  9maintainers:
 10  - Steen Hegelund <steen.hegelund@microchip.com>
 11  - Daniel Machon <daniel.machon@microchip.com>
 12
 13description: |
 14  The Sparx5 SERDES interfaces share the same basic functionality, but
 15  support different operating modes and line rates.
 16
 17  The following list lists the SERDES features:
 18
 19  * RX Adaptive Decision Feedback Equalizer (DFE)
 20  * Programmable continuous time linear equalizer (CTLE)
 21  * Rx variable gain control
 22  * Rx built-in fault detector (loss-of-lock/loss-of-signal)
 23  * Adjustable tx de-emphasis (FFE)
 24  * Tx output amplitude control
 25  * Supports rx eye monitor
 26  * Multiple loopback modes
 27  * Prbs generator and checker
 28  * Polarity inversion control
 29
 30  SERDES6G:
 31
 32  The SERDES6G is a high-speed SERDES interface, which can operate at
 33  the following data rates:
 34
 35  * 100 Mbps (100BASE-FX)
 36  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
 37  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
 38  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
 39
 40  SERDES10G
 41
 42  The SERDES10G is a high-speed SERDES interface, which can operate at
 43  the following data rates:
 44
 45  * 100 Mbps (100BASE-FX)
 46  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
 47  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
 48  * 5 Gbps (QSGMII/USGMII)
 49  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
 50  * 10 Gbps (10G-USGMII)
 51  * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
 52
 53  SERDES25G
 54
 55  The SERDES25G is a high-speed SERDES interface, which can operate at
 56  the following data rates:
 57
 58  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
 59  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
 60  * 5 Gbps (QSGMII/USGMII)
 61  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
 62  * 10 Gbps (10G-USGMII)
 63  * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
 64  * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
 65
 66  lan969x has ten SERDES10G interfaces that share the same features, operating
 67  modes and data rates as the equivalent Sparx5 SERDES10G interfaces.
 68
 69properties:
 70  $nodename:
 71    pattern: "^serdes@[0-9a-f]+$"
 72
 73  compatible:
 74    oneOf:
 75      - enum:
 76          - microchip,sparx5-serdes
 77          - microchip,lan9691-serdes
 78      - items:
 79          - enum:
 80              - microchip,lan9698-serdes
 81              - microchip,lan9696-serdes
 82              - microchip,lan9694-serdes
 83              - microchip,lan9693-serdes
 84              - microchip,lan9692-serdes
 85          - const: microchip,lan9691-serdes
 86
 87  reg:
 88    minItems: 1
 89
 90  '#phy-cells':
 91    const: 1
 92    description: |
 93      - The main serdes input port
 94
 95  clocks:
 96    maxItems: 1
 97
 98required:
 99  - compatible
100  - reg
101  - '#phy-cells'
102  - clocks
103
104additionalProperties: false
105
106examples:
107  - |
108    serdes: serdes@10808000 {
109      compatible = "microchip,sparx5-serdes";
110      #phy-cells = <1>;
111      clocks = <&sys_clk>;
112      reg = <0x10808000 0x5d0000>;
113    };
114
115...
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