fsl,mxs-usbphy.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/phy/fsl,mxs-usbphy.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale MXS USB Phy Device
  8
  9maintainers:
 10  - Xu Yang <xu.yang_2@nxp.com>
 11
 12properties:
 13  compatible:
 14    oneOf:
 15      - enum:
 16          - fsl,imx23-usbphy
 17          - fsl,imx7ulp-usbphy
 18          - fsl,vf610-usbphy
 19      - items:
 20          - enum:
 21              - fsl,imx28-usbphy
 22              - fsl,imx6ul-usbphy
 23              - fsl,imx6sl-usbphy
 24              - fsl,imx6sx-usbphy
 25              - fsl,imx6q-usbphy
 26          - const: fsl,imx23-usbphy
 27      - items:
 28          - const: fsl,imx6sll-usbphy
 29          - const: fsl,imx6ul-usbphy
 30          - const: fsl,imx23-usbphy
 31      - items:
 32          - enum:
 33              - fsl,imx8dxl-usbphy
 34              - fsl,imx8qm-usbphy
 35              - fsl,imx8qxp-usbphy
 36              - fsl,imx8ulp-usbphy
 37          - const: fsl,imx7ulp-usbphy
 38
 39  reg:
 40    maxItems: 1
 41
 42  interrupts:
 43    maxItems: 1
 44
 45  clocks:
 46    maxItems: 1
 47
 48  '#phy-cells':
 49    const: 0
 50
 51  power-domains:
 52    maxItems: 1
 53
 54  fsl,anatop:
 55    description:
 56      phandle for anatop register, it is only for imx6 SoC series.
 57    $ref: /schemas/types.yaml#/definitions/phandle
 58
 59  phy-3p0-supply:
 60    description:
 61      One of USB PHY's power supply. Can be used to keep a good signal
 62      quality.
 63
 64  fsl,tx-cal-45-dn-ohms:
 65    description:
 66      Resistance (in ohms) of switchable high-speed trimming resistor
 67      connected in parallel with the 45 ohm resistor that terminates
 68      the DN output signal.
 69    minimum: 35
 70    maximum: 54
 71    default: 45
 72
 73  fsl,tx-cal-45-dp-ohms:
 74    description:
 75      Resistance (in ohms) of switchable high-speed trimming resistor
 76      connected in parallel with the 45 ohm resistor that terminates
 77      the DP output signal.
 78    minimum: 35
 79    maximum: 54
 80    default: 45
 81
 82  fsl,tx-d-cal:
 83    description:
 84      Current trimming value (as a percentage) of the 17.78 mA TX
 85      reference current.
 86    $ref: /schemas/types.yaml#/definitions/uint32
 87    minimum: 79
 88    maximum: 119
 89    default: 100
 90
 91  nxp,sim:
 92    description:
 93      The system integration module (SIM) provides system control and chip
 94      configuration registers.
 95    $ref: /schemas/types.yaml#/definitions/phandle
 96
 97required:
 98  - compatible
 99  - reg
100  - clocks
101
102allOf:
103  - if:
104      properties:
105        compatible:
106          oneOf:
107            - enum:
108                - fsl,imx6q-usbphy
109                - fsl,imx6sl-usbphy
110                - fsl,imx6sx-usbphy
111                - fsl,imx6sll-usbphy
112                - fsl,vf610-usbphy
113            - items:
114                - const: fsl,imx6ul-usbphy
115                - const: fsl,imx23-usbphy
116    then:
117      required:
118        - fsl,anatop
119
120  - if:
121      properties:
122        compatible:
123          const: fsl,imx7ulp-usbphy
124    then:
125      required:
126        - nxp,sim
127    else:
128      properties:
129        nxp,sim: false
130
131additionalProperties: false
132
133examples:
134  - |
135    #include <dt-bindings/interrupt-controller/arm-gic.h>
136    #include <dt-bindings/clock/imx6qdl-clock.h>
137
138    usbphy1: usb-phy@20c9000 {
139        compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
140        reg = <0x020c9000 0x1000>;
141        clocks = <&clks IMX6QDL_CLK_USBPHY1>;
142        interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
143        fsl,anatop = <&anatop>;
144    };
145
146...