rcar-gen4-pci-host.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2# Copyright (C) 2022-2023 Renesas Electronics Corp.
  3%YAML 1.2
  4---
  5$id: http://devicetree.org/schemas/pci/rcar-gen4-pci-host.yaml#
  6$schema: http://devicetree.org/meta-schemas/core.yaml#
  7
  8title: Renesas R-Car Gen4 PCIe Host
  9
 10maintainers:
 11  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
 12
 13allOf:
 14  - $ref: snps,dw-pcie.yaml#
 15
 16properties:
 17  compatible:
 18    items:
 19      - enum:
 20          - renesas,r8a779f0-pcie      # R-Car S4-8
 21          - renesas,r8a779g0-pcie      # R-Car V4H
 22          - renesas,r8a779h0-pcie      # R-Car V4M
 23      - const: renesas,rcar-gen4-pcie  # R-Car Gen4
 24
 25  reg:
 26    maxItems: 7
 27
 28  reg-names:
 29    items:
 30      - const: dbi
 31      - const: dbi2
 32      - const: atu
 33      - const: dma
 34      - const: app
 35      - const: phy
 36      - const: config
 37
 38  interrupts:
 39    maxItems: 4
 40
 41  interrupt-names:
 42    items:
 43      - const: msi
 44      - const: dma
 45      - const: sft_ce
 46      - const: app
 47
 48  clocks:
 49    maxItems: 2
 50
 51  clock-names:
 52    items:
 53      - const: core
 54      - const: ref
 55
 56  power-domains:
 57    maxItems: 1
 58
 59  resets:
 60    maxItems: 1
 61
 62  reset-names:
 63    items:
 64      - const: pwr
 65
 66  max-link-speed:
 67    maximum: 4
 68
 69  num-lanes:
 70    maximum: 4
 71
 72required:
 73  - compatible
 74  - reg
 75  - reg-names
 76  - interrupts
 77  - interrupt-names
 78  - clocks
 79  - clock-names
 80  - power-domains
 81  - resets
 82  - reset-names
 83
 84unevaluatedProperties: false
 85
 86examples:
 87  - |
 88    #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
 89    #include <dt-bindings/interrupt-controller/arm-gic.h>
 90    #include <dt-bindings/power/r8a779f0-sysc.h>
 91
 92    soc {
 93        #address-cells = <2>;
 94        #size-cells = <2>;
 95
 96        pcie: pcie@e65d0000 {
 97            compatible = "renesas,r8a779f0-pcie", "renesas,rcar-gen4-pcie";
 98            reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
 99                  <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
100                  <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>,
101                  <0 0xfe000000 0 0x400000>;
102            reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";
103            interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
104                         <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
105                         <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
106                         <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
107            interrupt-names = "msi", "dma", "sft_ce", "app";
108            clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
109            clock-names = "core", "ref";
110            power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
111            resets = <&cpg 624>;
112            reset-names = "pwr";
113            max-link-speed = <4>;
114            num-lanes = <2>;
115            #address-cells = <3>;
116            #size-cells = <2>;
117            bus-range = <0x00 0xff>;
118            device_type = "pci";
119            ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>,
120                     <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>;
121            dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
122            #interrupt-cells = <1>;
123            interrupt-map-mask = <0 0 0 7>;
124            interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
125                            <0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
126                            <0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
127                            <0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
128            snps,enable-cdm-check;
129        };
130    };