fsl,mpc8xxx-pci.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4
  5$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
  6$schema: http://devicetree.org/meta-schemas/core.yaml#
  7
  8title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
  9
 10description:
 11  Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs
 12
 13maintainers:
 14  - J. Neuschäfer <j.neuschaefer@gmx.net>
 15
 16allOf:
 17  - $ref: /schemas/pci/pci-host-bridge.yaml#
 18
 19properties:
 20  compatible:
 21    oneOf:
 22      - enum:
 23          - fsl,mpc8314-pcie
 24          - fsl,mpc8349-pci
 25          - fsl,mpc8540-pci
 26          - fsl,mpc8548-pcie
 27          - fsl,mpc8641-pcie
 28      - items:
 29          - enum:
 30              - fsl,mpc8308-pcie
 31              - fsl,mpc8315-pcie
 32              - fsl,mpc8377-pcie
 33              - fsl,mpc8378-pcie
 34          - const: fsl,mpc8314-pcie
 35      - items:
 36          - const: fsl,mpc8360-pci
 37          - const: fsl,mpc8349-pci
 38      - items:
 39          - const: fsl,mpc8540-pcix
 40          - const: fsl,mpc8540-pci
 41
 42  reg:
 43    minItems: 1
 44    items:
 45      - description: internal registers
 46      - description: config space access registers
 47
 48  clock-frequency: true
 49
 50  interrupts:
 51    items:
 52      - description: Consolidated PCI interrupt
 53
 54  fsl,pci-agent-force-enum:
 55    type: boolean
 56    description:
 57      Typically any Freescale PCI-X bridge hardware strapped into Agent mode is
 58      prevented from enumerating the bus. The PrPMC form-factor requires all
 59      mezzanines to be PCI-X Agents, but one per system may still enumerate the
 60      bus.
 61
 62      This property allows a PCI-X bridge to be used for bus enumeration
 63      despite being strapped into Agent mode.
 64
 65required:
 66  - reg
 67  - compatible
 68
 69unevaluatedProperties: false
 70
 71examples:
 72  - |
 73    #include <dt-bindings/interrupt-controller/irq.h>
 74
 75    pcie@e0009000 {
 76        compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
 77        reg = <0xe0009000 0x00001000>;
 78        ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
 79                  0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
 80        #address-cells = <3>;
 81        #size-cells = <2>;
 82        #interrupt-cells = <1>;
 83        device_type = "pci";
 84        bus-range = <0 255>;
 85        interrupt-map-mask = <0xf800 0 0 7>;
 86        interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
 87                         0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
 88                         0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
 89                         0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
 90        clock-frequency = <0>;
 91    };
 92
 93  - |
 94    pci@ef008000 {
 95        compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 96        reg = <0xef008000 0x1000>;
 97        ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
 98                  0x01000000 0 0x00000000 0xd0000000 0 0x01000000>;
 99        #interrupt-cells = <1>;
100        #size-cells = <2>;
101        #address-cells = <3>;
102        device_type = "pci";
103        clock-frequency = <33333333>;
104        interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
105        interrupt-map = </* IDSEL */
106                         0xe000 0 0 1 &mpic 2 1
107                         0xe000 0 0 2 &mpic 3 1>;
108        interrupts-extended = <&mpic 24 2>;
109        bus-range = <0 0>;
110        fsl,pci-agent-force-enum;
111    };
112
113...