renesas,rzn1-miic.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Renesas RZ/N1, RZ/N2H and RZ/T2H MII converter
  8
  9maintainers:
 10  - Clément Léger <clement.leger@bootlin.com>
 11  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
 12
 13description: |
 14  This MII converter is present on the Renesas RZ/N1, RZ/N2H and RZ/T2H SoC
 15  families. It is responsible to do MII passthrough or convert it to RMII/RGMII.
 16
 17properties:
 18  '#address-cells':
 19    const: 1
 20
 21  '#size-cells':
 22    const: 0
 23
 24  compatible:
 25    oneOf:
 26      - items:
 27          - enum:
 28              - renesas,r9a06g032-miic
 29          - const: renesas,rzn1-miic
 30      - items:
 31          - const: renesas,r9a09g077-miic # RZ/T2H
 32      - items:
 33          - const: renesas,r9a09g087-miic # RZ/N2H
 34          - const: renesas,r9a09g077-miic
 35
 36  reg:
 37    maxItems: 1
 38
 39  clocks:
 40    items:
 41      - description: MII reference clock
 42      - description: RGMII reference clock
 43      - description: RMII reference clock
 44      - description: AHB clock used for the MII converter register interface
 45
 46  clock-names:
 47    items:
 48      - const: mii_ref
 49      - const: rgmii_ref
 50      - const: rmii_ref
 51      - const: hclk
 52
 53  resets:
 54    items:
 55      - description: Converter register reset
 56      - description: Converter reset
 57
 58  reset-names:
 59    items:
 60      - const: rst
 61      - const: crst
 62
 63  renesas,miic-switch-portin:
 64    description: MII Switch PORTIN configuration. This value should use one of
 65      the values defined in dt-bindings/net/pcs-rzn1-miic.h for RZ/N1 SoC and
 66      include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs.
 67    $ref: /schemas/types.yaml#/definitions/uint32
 68    enum: [0, 1, 2]
 69
 70  power-domains:
 71    maxItems: 1
 72
 73patternProperties:
 74  "^mii-conv@[0-5]$":
 75    type: object
 76    description: MII converter port
 77
 78    properties:
 79      reg:
 80        description: MII Converter port number.
 81        enum: [0, 1, 2, 3, 4, 5]
 82
 83      renesas,miic-input:
 84        description: Converter input port configuration. This value should use
 85          one of the values defined in dt-bindings/net/pcs-rzn1-miic.h for RZ/N1 SoC
 86          and include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs.
 87        $ref: /schemas/types.yaml#/definitions/uint32
 88
 89    required:
 90      - reg
 91      - renesas,miic-input
 92
 93    additionalProperties: false
 94
 95allOf:
 96  - if:
 97      properties:
 98        compatible:
 99          contains:
100            const: renesas,rzn1-miic
101    then:
102      properties:
103        renesas,miic-switch-portin:
104          enum: [1, 2]
105        resets: false
106        reset-names: false
107      patternProperties:
108        "^mii-conv@[0-5]$":
109          properties:
110            reg:
111              enum: [1, 2, 3, 4, 5]
112          allOf:
113            - if:
114                properties:
115                  reg:
116                    const: 1
117              then:
118                properties:
119                  renesas,miic-input:
120                    const: 0
121            - if:
122                properties:
123                  reg:
124                    const: 2
125              then:
126                properties:
127                  renesas,miic-input:
128                    enum: [1, 11]
129            - if:
130                properties:
131                  reg:
132                    const: 3
133              then:
134                properties:
135                  renesas,miic-input:
136                    enum: [7, 10]
137            - if:
138                properties:
139                  reg:
140                    const: 4
141              then:
142                properties:
143                  renesas,miic-input:
144                    enum: [4, 6, 9, 13]
145            - if:
146                properties:
147                  reg:
148                    const: 5
149              then:
150                properties:
151                  renesas,miic-input:
152                    enum: [3, 5, 8, 12]
153    else:
154      properties:
155        renesas,miic-switch-portin:
156          const: 0
157      required:
158        - resets
159        - reset-names
160      patternProperties:
161        "^mii-conv@[0-5]$":
162          properties:
163            reg:
164              enum: [0, 1, 2, 3]
165          allOf:
166            - if:
167                properties:
168                  reg:
169                    const: 0
170              then:
171                properties:
172                  renesas,miic-input:
173                    enum: [0, 3, 6]
174            - if:
175                properties:
176                  reg:
177                    const: 1
178              then:
179                properties:
180                  renesas,miic-input:
181                    enum: [1, 4, 7]
182            - if:
183                properties:
184                  reg:
185                    const: 2
186              then:
187                properties:
188                  renesas,miic-input:
189                    enum: [2, 5, 8]
190            - if:
191                properties:
192                  reg:
193                    const: 3
194              then:
195                properties:
196                  renesas,miic-input:
197                    const: 1
198
199required:
200  - '#address-cells'
201  - '#size-cells'
202  - compatible
203  - reg
204  - clocks
205  - clock-names
206  - power-domains
207
208additionalProperties: false
209
210examples:
211  - |
212    #include <dt-bindings/net/pcs-rzn1-miic.h>
213    #include <dt-bindings/clock/r9a06g032-sysctrl.h>
214
215    eth-miic@44030000 {
216      #address-cells = <1>;
217      #size-cells = <0>;
218      compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
219      reg = <0x44030000 0x10000>;
220      clocks = <&sysctrl R9A06G032_CLK_MII_REF>,
221              <&sysctrl R9A06G032_CLK_RGMII_REF>,
222              <&sysctrl R9A06G032_CLK_RMII_REF>,
223              <&sysctrl R9A06G032_HCLK_SWITCH_RG>;
224      clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
225      renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
226      power-domains = <&sysctrl>;
227
228      mii_conv1: mii-conv@1 {
229        renesas,miic-input = <MIIC_GMAC1_PORT>;
230        reg = <1>;
231      };
232
233      mii_conv2: mii-conv@2 {
234        renesas,miic-input = <MIIC_SWITCH_PORTD>;
235        reg = <2>;
236      };
237
238      mii_conv3: mii-conv@3 {
239        renesas,miic-input = <MIIC_SWITCH_PORTC>;
240        reg = <3>;
241      };
242
243      mii_conv4: mii-conv@4 {
244        renesas,miic-input = <MIIC_SWITCH_PORTB>;
245        reg = <4>;
246      };
247
248      mii_conv5: mii-conv@5 {
249        renesas,miic-input = <MIIC_SWITCH_PORTA>;
250        reg = <5>;
251      };
252    };