mediatek,star-emac.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: MediaTek STAR Ethernet MAC Controller
  8
  9maintainers:
 10  - Bartosz Golaszewski <bgolaszewski@baylibre.com>
 11
 12description:
 13  This Ethernet MAC is used on the MT8* family of SoCs from MediaTek.
 14  It's compliant with 802.3 standards and supports half- and full-duplex
 15  modes with flow-control as well as CRC offloading and VLAN tags.
 16
 17allOf:
 18  - $ref: ethernet-controller.yaml#
 19
 20properties:
 21  compatible:
 22    enum:
 23      - mediatek,mt8516-eth
 24      - mediatek,mt8518-eth
 25      - mediatek,mt8175-eth
 26      - mediatek,mt8365-eth
 27
 28  reg:
 29    maxItems: 1
 30
 31  interrupts:
 32    maxItems: 1
 33
 34  clocks:
 35    minItems: 3
 36    maxItems: 3
 37
 38  clock-names:
 39    additionalItems: false
 40    items:
 41      - const: core
 42      - const: reg
 43      - const: trans
 44
 45  mediatek,pericfg:
 46    $ref: /schemas/types.yaml#/definitions/phandle
 47    description:
 48      Phandle to the device containing the PERICFG register range. This is used
 49      to control the MII mode.
 50
 51  mediatek,rmii-rxc:
 52    type: boolean
 53    description:
 54      If present, indicates that the RMII reference clock, which is from external
 55      PHYs, is connected to RXC pin. Otherwise, is connected to TXC pin.
 56
 57  mediatek,rxc-inverse:
 58    type: boolean
 59    description:
 60      If present, indicates that clock on RXC pad will be inversed.
 61
 62  mediatek,txc-inverse:
 63    type: boolean
 64    description:
 65      If present, indicates that clock on TXC pad will be inversed.
 66
 67  mdio:
 68    $ref: mdio.yaml#
 69    unevaluatedProperties: false
 70
 71required:
 72  - compatible
 73  - reg
 74  - interrupts
 75  - clocks
 76  - clock-names
 77  - mediatek,pericfg
 78  - phy-handle
 79
 80unevaluatedProperties: false
 81
 82examples:
 83  - |
 84    #include <dt-bindings/interrupt-controller/arm-gic.h>
 85    #include <dt-bindings/clock/mt8516-clk.h>
 86
 87    ethernet: ethernet@11180000 {
 88        compatible = "mediatek,mt8516-eth";
 89        reg = <0x11180000 0x1000>;
 90        mediatek,pericfg = <&pericfg>;
 91        interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>;
 92        clocks = <&topckgen CLK_TOP_RG_ETH>,
 93                 <&topckgen CLK_TOP_66M_ETH>,
 94                 <&topckgen CLK_TOP_133M_ETH>;
 95        clock-names = "core", "reg", "trans";
 96        phy-handle = <&eth_phy>;
 97        phy-mode = "rmii";
 98
 99        mdio {
100            #address-cells = <1>;
101            #size-cells = <0>;
102
103            eth_phy: ethernet-phy@0 {
104                reg = <0>;
105            };
106        };
107    };