fsl,gianfar-mdio.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/net/fsl,gianfar-mdio.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale Gianfar (TSEC) MDIO Device
  8
  9description:
 10  This binding describes the MDIO is a bus to which the PHY devices are
 11  connected. For each device that exists on this bus, a child node should be
 12  created.
 13
 14  Some TSECs are associated with an internal Ten-Bit Interface (TBI) PHY. This
 15  PHY is accessed through the local MDIO bus. These buses are defined similarly
 16  to the mdio buses, except they are compatible with "fsl,gianfar-tbi". The TBI
 17  PHYs underneath them are similar to normal PHYs, but the reg property is
 18  considered instructive, rather than descriptive. The reg property should be
 19  chosen so it doesn't interfere with other PHYs on the bus.
 20
 21maintainers:
 22  - J. Neuschäfer <j.ne@posteo.net>
 23
 24# This is needed to distinguish gianfar.yaml and gianfar-mdio.yaml, because
 25# both use compatible = "gianfar" (with different device_type values)
 26select:
 27  oneOf:
 28    - properties:
 29        compatible:
 30          contains:
 31            const: gianfar
 32        device_type:
 33          const: mdio
 34      required:
 35        - device_type
 36
 37    - properties:
 38        compatible:
 39          contains:
 40            enum:
 41              - fsl,gianfar-tbi
 42              - fsl,gianfar-mdio
 43              - fsl,etsec2-tbi
 44              - fsl,etsec2-mdio
 45              - fsl,ucc-mdio
 46              - ucc_geth_phy
 47
 48  required:
 49    - compatible
 50
 51properties:
 52  compatible:
 53    enum:
 54      - fsl,gianfar-tbi
 55      - fsl,gianfar-mdio
 56      - fsl,etsec2-tbi
 57      - fsl,etsec2-mdio
 58      - fsl,ucc-mdio
 59      - gianfar
 60      - ucc_geth_phy
 61
 62  reg:
 63    minItems: 1
 64    items:
 65      - description:
 66          Offset and length of the register set for the device
 67
 68      - description:
 69          Optionally, the offset and length of the TBIPA register (TBI PHY
 70          address register). If TBIPA register is not specified, the driver
 71          will attempt to infer it from the register set specified (your
 72          mileage may vary).
 73
 74  device_type:
 75    const: mdio
 76
 77required:
 78  - reg
 79  - "#address-cells"
 80  - "#size-cells"
 81
 82allOf:
 83  - $ref: mdio.yaml#
 84
 85  - if:
 86      properties:
 87        compatible:
 88          contains:
 89            const: ucc_geth_phy
 90    then:
 91      required:
 92        - device_type
 93
 94unevaluatedProperties: false
 95
 96examples:
 97  - |
 98    soc {
 99        #address-cells = <1>;
100        #size-cells = <1>;
101
102        mdio@24520 {
103            reg = <0x24520 0x20>;
104            compatible = "fsl,gianfar-mdio";
105            #address-cells = <1>;
106            #size-cells = <0>;
107
108            ethernet-phy@0 {
109                reg = <0>;
110            };
111        };
112    };