fsl,fec.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/net/fsl,fec.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale Fast Ethernet Controller (FEC)
  8
  9maintainers:
 10  - Shawn Guo <shawnguo@kernel.org>
 11  - Wei Fang <wei.fang@nxp.com>
 12  - NXP Linux Team <linux-imx@nxp.com>
 13
 14allOf:
 15  - $ref: ethernet-controller.yaml#
 16
 17properties:
 18  compatible:
 19    oneOf:
 20      - enum:
 21          - fsl,imx25-fec
 22          - fsl,imx27-fec
 23          - fsl,imx28-fec
 24          - fsl,imx6q-fec
 25          - fsl,mvf600-fec
 26          - fsl,s32v234-fec
 27      - items:
 28          - enum:
 29              - fsl,imx53-fec
 30              - fsl,imx6sl-fec
 31          - const: fsl,imx25-fec
 32      - items:
 33          - enum:
 34              - fsl,imx35-fec
 35              - fsl,imx51-fec
 36          - const: fsl,imx27-fec
 37      - items:
 38          - enum:
 39              - fsl,imx6ul-fec
 40              - fsl,imx6sx-fec
 41          - const: fsl,imx6q-fec
 42      - items:
 43          - enum:
 44              - fsl,imx7d-fec
 45          - const: fsl,imx6sx-fec
 46      - items:
 47          - const: fsl,imx8mq-fec
 48          - const: fsl,imx6sx-fec
 49      - items:
 50          - enum:
 51              - fsl,imx8mm-fec
 52              - fsl,imx8mn-fec
 53              - fsl,imx8mp-fec
 54              - fsl,imx93-fec
 55          - const: fsl,imx8mq-fec
 56          - const: fsl,imx6sx-fec
 57      - items:
 58          - const: fsl,imx8qm-fec
 59          - const: fsl,imx6sx-fec
 60      - items:
 61          - enum:
 62              - fsl,imx8dxl-fec
 63              - fsl,imx8qxp-fec
 64          - const: fsl,imx8qm-fec
 65          - const: fsl,imx6sx-fec
 66      - items:
 67          - enum:
 68              - fsl,imx8ulp-fec
 69          - const: fsl,imx6ul-fec
 70          - const: fsl,imx6q-fec
 71
 72  reg:
 73    maxItems: 1
 74
 75  interrupts:
 76    minItems: 1
 77    maxItems: 4
 78
 79  interrupt-names:
 80    oneOf:
 81      - items:
 82          - const: int0
 83      - items:
 84          - const: int0
 85          - const: pps
 86      - items:
 87          - const: int0
 88          - const: int1
 89          - const: int2
 90      - items:
 91          - const: int0
 92          - const: int1
 93          - const: int2
 94          - const: pps
 95
 96  clocks:
 97    minItems: 2
 98    maxItems: 5
 99    description:
100      The "ipg", for MAC ipg_clk_s, ipg_clk_mac_s that are for register accessing.
101      The "ahb", for MAC ipg_clk, ipg_clk_mac that are bus clock.
102      The "ptp"(option), for IEEE1588 timer clock that requires the clock.
103      The "enet_clk_ref"(option), for MAC transmit/receiver reference clock like
104      RGMII TXC clock or RMII reference clock. It depends on board design,
105      the clock is required if RGMII TXC and RMII reference clock source from
106      SOC internal PLL.
107      The "enet_out"(option), output clock for external device, like supply clock
108      for PHY. The clock is required if PHY clock source from SOC.
109      The "enet_2x_txclk"(option), for RGMII sampling clock which fixed at 250Mhz.
110      The clock is required if SoC RGMII enable clock delay.
111
112  clock-names:
113    minItems: 2
114    maxItems: 5
115    items:
116      enum:
117        - ipg
118        - ahb
119        - ptp
120        - enet_clk_ref
121        - enet_out
122        - enet_2x_txclk
123
124  phy-mode: true
125
126  phy-handle: true
127
128  fixed-link: true
129
130  local-mac-address: true
131
132  mac-address: true
133
134  nvmem-cells: true
135
136  nvmem-cell-names: true
137
138  tx-internal-delay-ps:
139    enum: [0, 2000]
140
141  rx-internal-delay-ps:
142    enum: [0, 2000]
143
144  phy-supply:
145    description:
146      Regulator that powers the Ethernet PHY.
147
148  power-domains:
149    maxItems: 1
150
151  fsl,num-tx-queues:
152    $ref: /schemas/types.yaml#/definitions/uint32
153    description:
154      The property is valid for enet-avb IP, which supports hw multi queues.
155      Should specify the tx queue number, otherwise set tx queue number to 1.
156    enum: [1, 2, 3]
157
158  fsl,num-rx-queues:
159    $ref: /schemas/types.yaml#/definitions/uint32
160    description:
161      The property is valid for enet-avb IP, which supports hw multi queues.
162      Should specify the rx queue number, otherwise set rx queue number to 1.
163    enum: [1, 2, 3]
164
165  fsl,magic-packet:
166    $ref: /schemas/types.yaml#/definitions/flag
167    description:
168      If present, indicates that the hardware supports waking up via magic packet.
169
170  fsl,err006687-workaround-present:
171    $ref: /schemas/types.yaml#/definitions/flag
172    description:
173      If present indicates that the system has the hardware workaround for
174      ERR006687 applied and does not need a software workaround.
175
176  fsl,stop-mode:
177    $ref: /schemas/types.yaml#/definitions/phandle-array
178    items:
179      - items:
180          - description: phandle to general purpose register node
181          - description: the gpr register offset for ENET stop request
182          - description: the gpr bit offset for ENET stop request
183    description:
184      Register bits of stop mode control, the format is <&gpr req_gpr req_bit>.
185
186  fsl,pps-channel:
187    $ref: /schemas/types.yaml#/definitions/uint32
188    default: 0
189    description:
190      Specifies to which timer instance the PPS signal is routed.
191    enum: [0, 1, 2, 3]
192
193  mdio:
194    $ref: mdio.yaml#
195    unevaluatedProperties: false
196    description:
197      Specifies the mdio bus in the FEC, used as a container for phy nodes.
198
199  # Deprecated optional properties:
200  # To avoid these, create a phy node according to ethernet-phy.yaml in the same
201  # directory, and point the FEC's "phy-handle" property to it. Then use
202  # the phy's reset binding, again described by ethernet-phy.yaml.
203
204  phy-reset-gpios:
205    deprecated: true
206    description:
207      Should specify the gpio for phy reset.
208
209  phy-reset-duration:
210    $ref: /schemas/types.yaml#/definitions/uint32
211    deprecated: true
212    description:
213      Reset duration in milliseconds.  Should present only if property
214      "phy-reset-gpios" is available.  Missing the property will have the
215      duration be 1 millisecond.  Numbers greater than 1000 are invalid
216      and 1 millisecond will be used instead.
217
218  phy-reset-active-high:
219    type: boolean
220    deprecated: true
221    description:
222      If present then the reset sequence using the GPIO specified in the
223      "phy-reset-gpios" property is reversed (H=reset state, L=operation state).
224
225  phy-reset-post-delay:
226    $ref: /schemas/types.yaml#/definitions/uint32
227    deprecated: true
228    description:
229      Post reset delay in milliseconds. If present then a delay of phy-reset-post-delay
230      milliseconds will be observed after the phy-reset-gpios has been toggled.
231      Can be omitted thus no delay is observed. Delay is in range of 1ms to 1000ms.
232      Other delays are invalid.
233
234  iommus:
235    maxItems: 1
236
237required:
238  - compatible
239  - reg
240  - interrupts
241
242# FIXME: We had better set additionalProperties to false to avoid invalid or at
243# least undocumented properties. However, PHY may have a deprecated option to
244# place PHY OF properties in the MAC node, such as Micrel PHY, and we can find
245# these boards which is based on i.MX6QDL.
246unevaluatedProperties: false
247
248examples:
249  - |
250    ethernet@83fec000 {
251      compatible = "fsl,imx51-fec", "fsl,imx27-fec";
252      reg = <0x83fec000 0x4000>;
253      interrupts = <87>;
254      phy-mode = "mii";
255      phy-reset-gpios = <&gpio2 14 0>;
256      phy-supply = <&reg_fec_supply>;
257    };
258
259    ethernet@83fed000 {
260      compatible = "fsl,imx51-fec", "fsl,imx27-fec";
261      reg = <0x83fed000 0x4000>;
262      interrupts = <87>;
263      phy-mode = "mii";
264      phy-reset-gpios = <&gpio2 14 0>;
265      phy-supply = <&reg_fec_supply>;
266      phy-handle = <&ethphy0>;
267
268      mdio {
269        #address-cells = <1>;
270        #size-cells = <0>;
271
272        ethphy0: ethernet-phy@0 {
273          compatible = "ethernet-phy-ieee802.3-c22";
274          reg = <0>;
275        };
276      };
277    };