lantiq,gswip.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/net/dsa/lantiq,gswip.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Lantiq GSWIP and MaxLinear GSW1xx Ethernet switches
  8
  9description:
 10  Lantiq GSWIP and MaxLinear GSW1xx switches share the same hardware IP.
 11  Lantiq switches are embedded in SoCs and accessed via memory-mapped I/O,
 12  while MaxLinear switches are standalone ICs connected via MDIO.
 13
 14$ref: dsa.yaml#
 15
 16maintainers:
 17  - Hauke Mehrtens <hauke@hauke-m.de>
 18
 19properties:
 20  compatible:
 21    enum:
 22      - lantiq,xrx200-gswip
 23      - lantiq,xrx300-gswip
 24      - lantiq,xrx330-gswip
 25      - maxlinear,gsw120
 26      - maxlinear,gsw125
 27      - maxlinear,gsw140
 28      - maxlinear,gsw141
 29      - maxlinear,gsw145
 30
 31  reg:
 32    minItems: 1
 33    maxItems: 3
 34
 35  reg-names:
 36    items:
 37      - const: switch
 38      - const: mdio
 39      - const: mii
 40
 41  mdio:
 42    $ref: /schemas/net/mdio.yaml#
 43    unevaluatedProperties: false
 44
 45    properties:
 46      compatible:
 47        const: lantiq,xrx200-mdio
 48
 49  gphy-fw:
 50    type: object
 51    properties:
 52      '#address-cells':
 53        const: 1
 54
 55      '#size-cells':
 56        const: 0
 57
 58      compatible:
 59        items:
 60          - enum:
 61              - lantiq,xrx200-gphy-fw
 62              - lantiq,xrx300-gphy-fw
 63              - lantiq,xrx330-gphy-fw
 64          - const: lantiq,gphy-fw
 65
 66      lantiq,rcu:
 67        $ref: /schemas/types.yaml#/definitions/phandle
 68        description: phandle to the RCU syscon
 69
 70    patternProperties:
 71      "^gphy@[0-9a-f]{1,2}$":
 72        type: object
 73
 74        additionalProperties: false
 75
 76        properties:
 77          reg:
 78            minimum: 0
 79            maximum: 255
 80            description:
 81              Offset of the GPHY firmware register in the RCU register range
 82
 83          resets:
 84            items:
 85              - description: GPHY reset line
 86
 87          reset-names:
 88            items:
 89              - const: gphy
 90
 91        required:
 92          - reg
 93
 94    required:
 95      - compatible
 96      - lantiq,rcu
 97
 98    additionalProperties: false
 99
100patternProperties:
101  "^(ethernet-)?ports$":
102    type: object
103    patternProperties:
104      "^(ethernet-)?port@[0-6]$":
105        $ref: dsa-port.yaml#
106        unevaluatedProperties: false
107
108        properties:
109          maxlinear,rmii-refclk-out:
110            type: boolean
111            description:
112              Configure the RMII reference clock to be a clock output
113              rather than an input. Only applicable for RMII mode.
114          tx-internal-delay-ps:
115            enum: [0, 500, 1000, 1500, 2000, 2500, 3000, 3500]
116            description:
117              RGMII TX Clock Delay defined in pico seconds.
118              The delay lines adjust the MII clock vs. data timing.
119              If this property is not present the delay is determined by
120              the interface mode.
121          rx-internal-delay-ps:
122            enum: [0, 500, 1000, 1500, 2000, 2500, 3000, 3500]
123            description:
124              RGMII RX Clock Delay defined in pico seconds.
125              The delay lines adjust the MII clock vs. data timing.
126              If this property is not present the delay is determined by
127              the interface mode.
128
129required:
130  - compatible
131  - reg
132
133allOf:
134  - if:
135      properties:
136        compatible:
137          contains:
138            enum:
139              - lantiq,xrx200-gswip
140              - lantiq,xrx300-gswip
141              - lantiq,xrx330-gswip
142    then:
143      properties:
144        reg:
145          minItems: 3
146          maxItems: 3
147        mdio:
148          required:
149            - compatible
150    else:
151      properties:
152        reg:
153          maxItems: 1
154        reg-names: false
155        gphy-fw: false
156
157unevaluatedProperties: false
158
159examples:
160  - |
161    switch@e108000 {
162            compatible = "lantiq,xrx200-gswip";
163            reg = <0xe108000 0x3100>,  /* switch */
164                  <0xe10b100 0xd8>,    /* mdio */
165                  <0xe10b1d8 0x130>;   /* mii */
166            dsa,member = <0 0>;
167
168            ports {
169                    #address-cells = <1>;
170                    #size-cells = <0>;
171
172                    port@0 {
173                            reg = <0>;
174                            label = "lan3";
175                            phy-mode = "rgmii-id";
176                            phy-handle = <&phy0>;
177                            tx-internal-delay-ps = <2000>;
178                            rx-internal-delay-ps = <2000>;
179                    };
180
181                    port@1 {
182                            reg = <1>;
183                            label = "lan4";
184                            phy-mode = "rgmii";
185                            phy-handle = <&phy1>;
186                    };
187
188                    port@2 {
189                            reg = <2>;
190                            label = "lan2";
191                            phy-mode = "internal";
192                            phy-handle = <&phy11>;
193                    };
194
195                    port@4 {
196                            reg = <4>;
197                            label = "lan1";
198                            phy-mode = "internal";
199                            phy-handle = <&phy13>;
200                    };
201
202                    port@5 {
203                            reg = <5>;
204                            label = "wan";
205                            phy-mode = "rgmii";
206                            phy-handle = <&phy5>;
207                    };
208
209                    port@6 {
210                            reg = <0x6>;
211                            phy-mode = "internal";
212                            ethernet = <&eth0>;
213
214                            fixed-link {
215                                    speed = <1000>;
216                                    full-duplex;
217                            };
218                    };
219            };
220
221            mdio {
222                    #address-cells = <1>;
223                    #size-cells = <0>;
224                    compatible = "lantiq,xrx200-mdio";
225
226                    phy0: ethernet-phy@0 {
227                            reg = <0x0>;
228                    };
229                    phy1: ethernet-phy@1 {
230                            reg = <0x1>;
231                    };
232                    phy5: ethernet-phy@5 {
233                            reg = <0x5>;
234                    };
235                    phy11: ethernet-phy@11 {
236                            reg = <0x11>;
237                    };
238                    phy13: ethernet-phy@13 {
239                            reg = <0x13>;
240                    };
241            };
242
243            gphy-fw {
244                    #address-cells = <1>;
245                    #size-cells = <0>;
246                    compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
247                    lantiq,rcu = <&rcu0>;
248
249                    gphy@20 {
250                            reg = <0x20>;
251
252                            resets = <&reset0 31 30>;
253                            reset-names = "gphy";
254                    };
255
256                    gphy@68 {
257                            reg = <0x68>;
258
259                            resets = <&reset0 29 28>;
260                            reset-names = "gphy";
261                    };
262            };
263    };
264
265  - |
266    #include <dt-bindings/leds/common.h>
267
268    mdio {
269        #address-cells = <1>;
270        #size-cells = <0>;
271
272        switch@1f {
273            compatible = "maxlinear,gsw125";
274            reg = <0x1f>;
275
276            ports {
277                #address-cells = <1>;
278                #size-cells = <0>;
279
280                port@0 {
281                    reg = <0>;
282                    label = "lan0";
283                    phy-handle = <&switchphy0>;
284                    phy-mode = "internal";
285                };
286
287                port@1 {
288                    reg = <1>;
289                    label = "lan1";
290                    phy-handle = <&switchphy1>;
291                    phy-mode = "internal";
292                };
293
294                port@4 {
295                    reg = <4>;
296                    label = "wan";
297                    phy-mode = "1000base-x";
298                    managed = "in-band-status";
299                };
300
301                port@5 {
302                    reg = <5>;
303                    phy-mode = "rgmii-id";
304                    tx-internal-delay-ps = <2000>;
305                    rx-internal-delay-ps = <2000>;
306                    ethernet = <&eth0>;
307
308                    fixed-link {
309                        speed = <1000>;
310                        full-duplex;
311                    };
312                };
313            };
314
315            mdio {
316                #address-cells = <1>;
317                #size-cells = <0>;
318
319                switchphy0: switchphy@0 {
320                    reg = <0>;
321
322                    leds {
323                        #address-cells = <1>;
324                        #size-cells = <0>;
325
326                        led@0 {
327                            reg = <0>;
328                            color = <LED_COLOR_ID_GREEN>;
329                            function = LED_FUNCTION_LAN;
330                        };
331                    };
332                };
333
334                switchphy1: switchphy@1 {
335                    reg = <1>;
336
337                    leds {
338                        #address-cells = <1>;
339                        #size-cells = <0>;
340
341                        led@0 {
342                            reg = <0>;
343                            color = <LED_COLOR_ID_GREEN>;
344                            function = LED_FUNCTION_LAN;
345                        };
346                    };
347                };
348            };
349        };
350    };