fsl,flexcan.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title:
  8  Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
  9
 10maintainers:
 11  - Marc Kleine-Budde <mkl@pengutronix.de>
 12
 13properties:
 14  compatible:
 15    oneOf:
 16      - enum:
 17          - fsl,imx95-flexcan
 18          - fsl,imx93-flexcan
 19          - fsl,imx8qm-flexcan
 20          - fsl,imx8mp-flexcan
 21          - fsl,imx6q-flexcan
 22          - fsl,imx28-flexcan
 23          - fsl,imx25-flexcan
 24          - fsl,p1010-flexcan
 25          - fsl,vf610-flexcan
 26          - fsl,ls1021ar2-flexcan
 27          - fsl,lx2160ar1-flexcan
 28          - nxp,s32g2-flexcan
 29      - items:
 30          - enum:
 31              - fsl,imx53-flexcan
 32              - fsl,imx35-flexcan
 33          - const: fsl,imx25-flexcan
 34      - items:
 35          - enum:
 36              - fsl,imx7d-flexcan
 37              - fsl,imx6ul-flexcan
 38              - fsl,imx6sx-flexcan
 39          - const: fsl,imx6q-flexcan
 40      - items:
 41          - enum:
 42              - fsl,ls1028ar1-flexcan
 43          - const: fsl,lx2160ar1-flexcan
 44      - items:
 45          - enum:
 46              - nxp,s32g3-flexcan
 47          - const: nxp,s32g2-flexcan
 48      - items:
 49          - enum:
 50              - fsl,imx94-flexcan
 51          - const: fsl,imx95-flexcan
 52
 53  reg:
 54    maxItems: 1
 55
 56  interrupts:
 57    minItems: 1
 58    maxItems: 4
 59
 60  interrupt-names:
 61    minItems: 1
 62    maxItems: 4
 63
 64  clocks:
 65    maxItems: 2
 66
 67  clock-names:
 68    items:
 69      - const: ipg
 70      - const: per
 71
 72  clock-frequency:
 73    description: |
 74      The oscillator frequency driving the flexcan device, filled in by the
 75      boot loader. This property should only be used the used operating system
 76      doesn't support the clocks and clock-names property.
 77
 78  power-domains:
 79    maxItems: 1
 80
 81  xceiver-supply:
 82    description: Regulator that powers the CAN transceiver.
 83
 84  phys:
 85    maxItems: 1
 86
 87  big-endian:
 88    $ref: /schemas/types.yaml#/definitions/flag
 89    description: |
 90      This means the registers of FlexCAN controller are big endian. This is
 91      optional property.i.e. if this property is not present in device tree
 92      node then controller is assumed to be little endian. If this property is
 93      present then controller is assumed to be big endian.
 94
 95  can-transceiver:
 96    $ref: can-transceiver.yaml#
 97    unevaluatedProperties: false
 98
 99  fsl,stop-mode:
100    description: |
101      Register bits of stop mode control.
102
103      The format should be as follows:
104      <gpr req_gpr req_bit>
105      gpr is the phandle to general purpose register node.
106      req_gpr is the gpr register offset of CAN stop request.
107      req_bit is the bit offset of CAN stop request.
108    $ref: /schemas/types.yaml#/definitions/phandle-array
109    items:
110      - items:
111          - description: The 'gpr' is the phandle to general purpose register node.
112          - description: The 'req_gpr' is the gpr register offset of CAN stop request.
113            maximum: 0xff
114          - description: The 'req_bit' is the bit offset of CAN stop request.
115            maximum: 0x1f
116
117  fsl,clk-source:
118    description: |
119      Select the clock source to the CAN Protocol Engine (PE). It's SoC
120      implementation dependent. Refer to RM for detailed definition. If this
121      property is not set in device tree node then driver selects clock source 1
122      by default.
123      0: clock source 0 (oscillator clock)
124      1: clock source 1 (peripheral clock)
125    $ref: /schemas/types.yaml#/definitions/uint8
126    default: 1
127    minimum: 0
128    maximum: 1
129
130  wakeup-source:
131    $ref: /schemas/types.yaml#/definitions/flag
132    description:
133      Enable CAN remote wakeup.
134
135  fsl,scu-index:
136    description: |
137      The scu index of CAN instance.
138      For SoCs with SCU support, need setup stop mode via SCU firmware, so this
139      property can help indicate a resource. It supports up to 3 CAN instances
140      now.
141    $ref: /schemas/types.yaml#/definitions/uint8
142    minimum: 0
143    maximum: 2
144
145  termination-gpios: true
146  termination-ohms: true
147
148required:
149  - compatible
150  - reg
151  - interrupts
152
153allOf:
154  - $ref: can-controller.yaml#
155  - if:
156      properties:
157        compatible:
158          contains:
159            const: nxp,s32g2-flexcan
160    then:
161      properties:
162        interrupts:
163          items:
164            - description: Message Buffer interrupt for mailboxes 0-7 and Enhanced RX FIFO
165            - description: Device state change
166            - description: Bus Error detection
167            - description: Message Buffer interrupt for mailboxes 8-127
168        interrupt-names:
169          items:
170            - const: mb-0
171            - const: state
172            - const: berr
173            - const: mb-1
174      required:
175        - interrupt-names
176    else:
177      properties:
178        interrupts:
179          maxItems: 1
180        interrupt-names: false
181  - if:
182      required:
183        - xceiver-supply
184    then:
185      properties:
186        phys: false
187
188additionalProperties: false
189
190examples:
191  - |
192    can@1c000 {
193        compatible = "fsl,p1010-flexcan";
194        reg = <0x1c000 0x1000>;
195        interrupts = <48 0x2>;
196        interrupt-parent = <&mpic>;
197        clock-frequency = <200000000>;
198        fsl,clk-source = /bits/ 8 <0>;
199    };
200  - |
201    #include <dt-bindings/interrupt-controller/irq.h>
202
203    can@2090000 {
204        compatible = "fsl,imx6q-flexcan";
205        reg = <0x02090000 0x4000>;
206        interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
207        clocks = <&clks 1>, <&clks 2>;
208        clock-names = "ipg", "per";
209        fsl,stop-mode = <&gpr 0x34 28>;
210        fsl,scu-index = /bits/ 8 <1>;
211    };
212  - |
213    #include <dt-bindings/interrupt-controller/irq.h>
214    #include <dt-bindings/gpio/gpio.h>
215
216    can@2090000 {
217        compatible = "fsl,imx6q-flexcan";
218        reg = <0x02090000 0x4000>;
219        interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
220        clocks = <&clks 1>, <&clks 2>;
221        clock-names = "ipg", "per";
222        fsl,stop-mode = <&gpr 0x34 28>;
223        termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
224        termination-ohms = <120>;
225    };