allwinner,sun8i-a83t-emac.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Allwinner A83t EMAC
  8
  9maintainers:
 10  - Chen-Yu Tsai <wens@csie.org>
 11  - Maxime Ripard <mripard@kernel.org>
 12
 13# We need a select here so we don't match all nodes with 'snps,dwmac'
 14select:
 15  properties:
 16    compatible:
 17      contains:
 18        enum:
 19          - allwinner,sun8i-a83t-emac
 20          - allwinner,sun8i-h3-emac
 21          - allwinner,sun8i-r40-gmac
 22          - allwinner,sun8i-v3s-emac
 23          - allwinner,sun50i-a64-emac
 24          - allwinner,sun55i-a523-gmac200
 25  required:
 26    - compatible
 27
 28properties:
 29  compatible:
 30    oneOf:
 31      - const: allwinner,sun8i-a83t-emac
 32      - const: allwinner,sun8i-h3-emac
 33      - const: allwinner,sun8i-r40-gmac
 34      - const: allwinner,sun8i-v3s-emac
 35      - const: allwinner,sun50i-a64-emac
 36      - items:
 37          - enum:
 38              - allwinner,sun20i-d1-emac
 39              - allwinner,sun50i-a100-emac
 40              - allwinner,sun50i-h6-emac
 41              - allwinner,sun50i-h616-emac0
 42              - allwinner,sun55i-a523-gmac0
 43          - const: allwinner,sun50i-a64-emac
 44      - items:
 45          - const: allwinner,sun55i-a523-gmac200
 46          - const: snps,dwmac-4.20a
 47
 48  reg:
 49    maxItems: 1
 50
 51  interrupts:
 52    maxItems: 1
 53
 54  interrupt-names:
 55    const: macirq
 56
 57  clocks:
 58    minItems: 1
 59    maxItems: 2
 60
 61  clock-names:
 62    minItems: 1
 63    items:
 64      - const: stmmaceth
 65      - const: mbus
 66
 67  phy-supply:
 68    description: PHY regulator
 69
 70  power-domains:
 71    maxItems: 1
 72
 73  syscon:
 74    $ref: /schemas/types.yaml#/definitions/phandle
 75    description:
 76      Phandle to the device containing the EMAC or GMAC clock
 77      register
 78
 79required:
 80  - compatible
 81  - reg
 82  - interrupts
 83  - interrupt-names
 84  - clocks
 85  - clock-names
 86  - resets
 87  - reset-names
 88  - phy-handle
 89  - phy-mode
 90  - syscon
 91
 92allOf:
 93  - $ref: snps,dwmac.yaml#
 94  - if:
 95      properties:
 96        compatible:
 97          contains:
 98            enum:
 99              - allwinner,sun8i-a83t-emac
100              - allwinner,sun8i-h3-emac
101              - allwinner,sun8i-v3s-emac
102              - allwinner,sun50i-a64-emac
103
104    then:
105      properties:
106        allwinner,tx-delay-ps:
107          default: 0
108          minimum: 0
109          maximum: 700
110          multipleOf: 100
111          description:
112            External RGMII PHY TX clock delay chain value in ps.
113
114        allwinner,rx-delay-ps:
115          default: 0
116          minimum: 0
117          maximum: 3100
118          multipleOf: 100
119          description:
120            External RGMII PHY TX clock delay chain value in ps.
121
122  - if:
123      properties:
124        compatible:
125          contains:
126            enum:
127              - allwinner,sun8i-r40-gmac
128
129    then:
130      properties:
131        allwinner,rx-delay-ps:
132          default: 0
133          minimum: 0
134          maximum: 700
135          multipleOf: 100
136          description:
137            External RGMII PHY TX clock delay chain value in ps.
138
139  - if:
140      properties:
141        compatible:
142          contains:
143            enum:
144              - allwinner,sun8i-h3-emac
145              - allwinner,sun8i-v3s-emac
146
147    then:
148      properties:
149        allwinner,leds-active-low:
150          $ref: /schemas/types.yaml#/definitions/flag
151          description:
152            EPHY LEDs are active low.
153
154        mdio-mux:
155          type: object
156          unevaluatedProperties: false
157
158          properties:
159            compatible:
160              const: allwinner,sun8i-h3-mdio-mux
161
162            mdio-parent-bus:
163              $ref: /schemas/types.yaml#/definitions/phandle
164              description:
165                Phandle to EMAC MDIO.
166
167            "#address-cells":
168              const: 1
169
170            "#size-cells":
171              const: 0
172
173            mdio@1:
174              $ref: mdio.yaml#
175              unevaluatedProperties: false
176              description: Internal MDIO Bus
177
178              properties:
179                compatible:
180                  const: allwinner,sun8i-h3-mdio-internal
181
182                reg:
183                  const: 1
184
185              patternProperties:
186                "^ethernet-phy@[0-9a-f]$":
187                  type: object
188                  $ref: ethernet-phy.yaml#
189                  unevaluatedProperties: false
190                  description:
191                    Integrated PHY node
192
193                  properties:
194                    clocks:
195                      maxItems: 1
196
197                    resets:
198                      maxItems: 1
199
200                  required:
201                    - clocks
202                    - resets
203
204            mdio@2:
205              $ref: mdio.yaml#
206              unevaluatedProperties: false
207              description: External MDIO Bus (H3 only)
208
209              properties:
210                reg:
211                  const: 2
212
213          required:
214            - compatible
215            - mdio-parent-bus
216            - mdio@1
217
218  - if:
219      properties:
220        compatible:
221          contains:
222            const: allwinner,sun55i-a523-gmac200
223    then:
224      properties:
225        clocks:
226          minItems: 2
227        clock-names:
228          minItems: 2
229        tx-internal-delay-ps:
230          default: 0
231          minimum: 0
232          maximum: 700
233          multipleOf: 100
234          description:
235            External RGMII PHY TX clock delay chain value in ps.
236        rx-internal-delay-ps:
237          default: 0
238          minimum: 0
239          maximum: 3100
240          multipleOf: 100
241          description:
242            External RGMII PHY TX clock delay chain value in ps.
243      required:
244        - power-domains
245    else:
246      properties:
247        clocks:
248          maxItems: 1
249        clock-names:
250          maxItems: 1
251        power-domains: false
252
253unevaluatedProperties: false
254
255examples:
256  - |
257    ethernet@1c0b000 {
258        compatible = "allwinner,sun8i-h3-emac";
259        syscon = <&syscon>;
260        reg = <0x01c0b000 0x104>;
261        interrupts = <0 82 1>;
262        interrupt-names = "macirq";
263        resets = <&ccu 12>;
264        reset-names = "stmmaceth";
265        clocks = <&ccu 27>;
266        clock-names = "stmmaceth";
267
268        phy-handle = <&int_mii_phy>;
269        phy-mode = "mii";
270        allwinner,leds-active-low;
271
272        mdio1: mdio {
273            #address-cells = <1>;
274            #size-cells = <0>;
275            compatible = "snps,dwmac-mdio";
276        };
277
278        mdio-mux {
279            compatible = "allwinner,sun8i-h3-mdio-mux";
280            #address-cells = <1>;
281            #size-cells = <0>;
282
283            mdio-parent-bus = <&mdio1>;
284
285            int_mii_phy: mdio@1 {
286                compatible = "allwinner,sun8i-h3-mdio-internal";
287                reg = <1>;
288                #address-cells = <1>;
289                #size-cells = <0>;
290
291                ethernet-phy@1 {
292                    reg = <1>;
293                    clocks = <&ccu 67>;
294                    resets = <&ccu 39>;
295                    phy-is-integrated;
296                };
297            };
298
299            mdio@2 {
300                reg = <2>;
301                #address-cells = <1>;
302                #size-cells = <0>;
303            };
304        };
305    };
306
307  - |
308    ethernet@1c0b000 {
309        compatible = "allwinner,sun8i-h3-emac";
310        syscon = <&syscon>;
311        reg = <0x01c0b000 0x104>;
312        interrupts = <0 82 1>;
313        interrupt-names = "macirq";
314        resets = <&ccu 12>;
315        reset-names = "stmmaceth";
316        clocks = <&ccu 27>;
317        clock-names = "stmmaceth";
318
319        phy-handle = <&ext_rgmii_phy>;
320        phy-mode = "rgmii";
321        allwinner,leds-active-low;
322
323        mdio2: mdio {
324            #address-cells = <1>;
325            #size-cells = <0>;
326            compatible = "snps,dwmac-mdio";
327        };
328
329        mdio-mux {
330            compatible = "allwinner,sun8i-h3-mdio-mux";
331            #address-cells = <1>;
332            #size-cells = <0>;
333            mdio-parent-bus = <&mdio2>;
334
335            mdio@1 {
336                compatible = "allwinner,sun8i-h3-mdio-internal";
337                reg = <1>;
338                #address-cells = <1>;
339                #size-cells = <0>;
340
341                ethernet-phy@1 {
342                    reg = <1>;
343                    clocks = <&ccu 67>;
344                    resets = <&ccu 39>;
345                };
346            };
347
348            mdio@2 {
349                reg = <2>;
350                #address-cells = <1>;
351                #size-cells = <0>;
352
353                ext_rgmii_phy: ethernet-phy@1 {
354                    reg = <1>;
355                };
356            };
357        };
358    };
359
360  - |
361    ethernet@1c0b000 {
362        compatible = "allwinner,sun8i-a83t-emac";
363        syscon = <&syscon>;
364        reg = <0x01c0b000 0x104>;
365        interrupts = <0 82 1>;
366        interrupt-names = "macirq";
367        resets = <&ccu 13>;
368        reset-names = "stmmaceth";
369        clocks = <&ccu 27>;
370        clock-names = "stmmaceth";
371        phy-handle = <&ext_rgmii_phy1>;
372        phy-mode = "rgmii";
373
374        mdio {
375            compatible = "snps,dwmac-mdio";
376            #address-cells = <1>;
377            #size-cells = <0>;
378
379            ext_rgmii_phy1: ethernet-phy@1 {
380                reg = <1>;
381            };
382        };
383    };
384
385  - |
386    ethernet@4510000 {
387        compatible = "allwinner,sun55i-a523-gmac200",
388                     "snps,dwmac-4.20a";
389        reg = <0x04510000 0x10000>;
390        clocks = <&ccu 117>, <&ccu 79>;
391        clock-names = "stmmaceth", "mbus";
392        resets = <&ccu 43>;
393        reset-names = "stmmaceth";
394        interrupts = <0 47 4>;
395        interrupt-names = "macirq";
396        pinctrl-names = "default";
397        pinctrl-0 = <&rgmii1_pins>;
398        power-domains = <&pck600 4>;
399        syscon = <&syscon>;
400        phy-handle = <&ext_rgmii_phy_1>;
401        phy-mode = "rgmii-id";
402        snps,fixed-burst;
403        snps,axi-config = <&gmac1_stmmac_axi_setup>;
404
405        mdio {
406            compatible = "snps,dwmac-mdio";
407            #address-cells = <1>;
408            #size-cells = <0>;
409
410            ext_rgmii_phy_1: ethernet-phy@1 {
411                reg = <1>;
412            };
413        };
414    };
415...