airoha,en7581-eth.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/net/airoha,en7581-eth.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Airoha EN7581 Frame Engine Ethernet controller
  8
  9maintainers:
 10  - Lorenzo Bianconi <lorenzo@kernel.org>
 11
 12description:
 13  The frame engine ethernet controller can be found on Airoha SoCs.
 14  These SoCs have multi-GMAC ports.
 15
 16properties:
 17  compatible:
 18    enum:
 19      - airoha,en7581-eth
 20      - airoha,an7583-eth
 21
 22  reg:
 23    items:
 24      - description: Frame engine base address
 25      - description: QDMA0 base address
 26      - description: QDMA1 base address
 27
 28  reg-names:
 29    items:
 30      - const: fe
 31      - const: qdma0
 32      - const: qdma1
 33
 34  interrupts:
 35    items:
 36      - description: QDMA lan irq0
 37      - description: QDMA lan irq1
 38      - description: QDMA lan irq2
 39      - description: QDMA lan irq3
 40      - description: QDMA wan irq0
 41      - description: QDMA wan irq1
 42      - description: QDMA wan irq2
 43      - description: QDMA wan irq3
 44      - description: FE error irq
 45      - description: PDMA irq
 46
 47  resets:
 48    minItems: 7
 49    maxItems: 8
 50
 51  reset-names:
 52    items:
 53      - const: fe
 54      - const: pdma
 55      - const: qdma
 56      - const: xsi-mac
 57      - const: hsi0-mac
 58      - const: hsi1-mac
 59      - enum: [ hsi-mac, xfp-mac ]
 60      - const: xfp-mac
 61    minItems: 7
 62
 63  memory-region:
 64    items:
 65      - description: QDMA0 buffer memory
 66      - description: QDMA1 buffer memory
 67
 68  memory-region-names:
 69    items:
 70      - const: qdma0-buf
 71      - const: qdma1-buf
 72
 73  "#address-cells":
 74    const: 1
 75
 76  "#size-cells":
 77    const: 0
 78
 79  airoha,npu:
 80    $ref: /schemas/types.yaml#/definitions/phandle
 81    description:
 82      Phandle to the node used to configure the NPU module.
 83      The Airoha Network Processor Unit (NPU) provides a configuration
 84      interface to implement hardware flow offloading programming Packet
 85      Processor Engine (PPE) flow table.
 86
 87allOf:
 88  - $ref: ethernet-controller.yaml#
 89  - if:
 90      properties:
 91        compatible:
 92          contains:
 93            enum:
 94              - airoha,en7581-eth
 95    then:
 96      properties:
 97        resets:
 98          minItems: 8
 99
100        reset-names:
101          minItems: 8
102
103  - if:
104      properties:
105        compatible:
106          contains:
107            enum:
108              - airoha,an7583-eth
109    then:
110      properties:
111        resets:
112          maxItems: 7
113
114        reset-names:
115          maxItems: 7
116
117patternProperties:
118  "^ethernet@[1-4]$":
119    type: object
120    unevaluatedProperties: false
121    $ref: ethernet-controller.yaml#
122    description:
123      Ethernet GMAC port associated to the MAC controller
124    properties:
125      compatible:
126        const: airoha,eth-mac
127
128      reg:
129        minimum: 1
130        maximum: 4
131        description: GMAC port identifier
132
133    required:
134      - reg
135      - compatible
136
137required:
138  - compatible
139  - reg
140  - interrupts
141  - resets
142  - reset-names
143
144unevaluatedProperties: false
145
146examples:
147  - |
148    #include <dt-bindings/interrupt-controller/arm-gic.h>
149    #include <dt-bindings/interrupt-controller/irq.h>
150    #include <dt-bindings/clock/en7523-clk.h>
151
152    soc {
153      #address-cells = <2>;
154      #size-cells = <2>;
155
156      eth: ethernet@1fb50000 {
157        compatible = "airoha,en7581-eth";
158        reg = <0 0x1fb50000 0 0x2600>,
159              <0 0x1fb54000 0 0x2000>,
160              <0 0x1fb56000 0 0x2000>;
161        reg-names = "fe", "qdma0", "qdma1";
162
163        resets = <&scuclk 44>,
164                 <&scuclk 30>,
165                 <&scuclk 31>,
166                 <&scuclk 6>,
167                 <&scuclk 15>,
168                 <&scuclk 16>,
169                 <&scuclk 17>,
170                 <&scuclk 26>;
171        reset-names = "fe", "pdma", "qdma", "xsi-mac",
172                      "hsi0-mac", "hsi1-mac", "hsi-mac",
173                      "xfp-mac";
174
175        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
176                     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
177                     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
178                     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
179                     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
180                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
181                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
182                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
183                     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
184                     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
185
186        memory-region = <&qdma0_buf>, <&qdma1_buf>;
187        memory-region-names = "qdma0-buf", "qdma1-buf";
188
189        airoha,npu = <&npu>;
190
191        #address-cells = <1>;
192        #size-cells = <0>;
193
194        mac: ethernet@1 {
195          compatible = "airoha,eth-mac";
196          reg = <1>;
197        };
198      };
199    };