FILE
rockchip-dw-mshc.yaml
File preview with syntax highlighting.
linux-6.19.14/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip designware mobile storage host controller 8 9description: 10 Rockchip uses the Synopsys designware mobile storage host controller 11 to interface a SoC with storage medium such as eMMC or SD/MMC cards. 12 This file documents the combined properties for the core Synopsys dw mshc 13 controller that are not already included in the synopsys-dw-mshc-common.yaml 14 file and the Rockchip specific extensions. 15 16allOf: 17 - $ref: synopsys-dw-mshc-common.yaml# 18 19maintainers: 20 - Heiko Stuebner <heiko@sntech.de> 21 22# Everything else is described in the common file 23properties: 24 compatible: 25 oneOf: 26 # for Rockchip RK2928 and before RK3288 27 - const: rockchip,rk2928-dw-mshc 28 # for Rockchip RK3288 29 - const: rockchip,rk3288-dw-mshc 30 - items: 31 - enum: 32 - rockchip,px30-dw-mshc 33 - rockchip,rk1808-dw-mshc 34 - rockchip,rk3036-dw-mshc 35 - rockchip,rk3128-dw-mshc 36 - rockchip,rk3228-dw-mshc 37 - rockchip,rk3308-dw-mshc 38 - rockchip,rk3328-dw-mshc 39 - rockchip,rk3368-dw-mshc 40 - rockchip,rk3399-dw-mshc 41 - rockchip,rk3506-dw-mshc 42 - rockchip,rk3528-dw-mshc 43 - rockchip,rk3562-dw-mshc 44 - rockchip,rk3568-dw-mshc 45 - rockchip,rk3588-dw-mshc 46 - rockchip,rv1108-dw-mshc 47 - rockchip,rv1126-dw-mshc 48 - const: rockchip,rk3288-dw-mshc 49 # for Rockchip RK3576 with phase tuning inside the controller 50 - const: rockchip,rk3576-dw-mshc 51 52 reg: 53 maxItems: 1 54 55 interrupts: 56 maxItems: 1 57 58 clocks: 59 minItems: 2 60 maxItems: 4 61 description: 62 Handle to "biu" and "ciu" clocks for the bus interface unit clock and 63 the card interface unit clock. If "ciu-drive" and "ciu-sample" are 64 specified in clock-names, it should also contain 65 handles to these clocks. 66 67 clock-names: 68 minItems: 2 69 items: 70 - const: biu 71 - const: ciu 72 - const: ciu-drive 73 - const: ciu-sample 74 description: 75 Apart from the clock-names "biu" and "ciu" two more clocks 76 "ciu-drive" and "ciu-sample" are supported. They are used 77 to control the clock phases, "ciu-sample" is required for tuning 78 high speed modes. 79 80 power-domains: 81 maxItems: 1 82 83 rockchip,default-sample-phase: 84 $ref: /schemas/types.yaml#/definitions/uint32 85 minimum: 0 86 maximum: 360 87 default: 0 88 description: 89 The default phase to set "ciu-sample" at probing, 90 low speeds or in case where all phases work at tuning time. 91 If not specified 0 deg will be used. 92 93 rockchip,desired-num-phases: 94 $ref: /schemas/types.yaml#/definitions/uint32 95 minimum: 0 96 maximum: 360 97 default: 360 98 description: 99 The desired number of times that the host execute tuning when needed. 100 If not specified, the host will do tuning for 360 times, 101 namely tuning for each degree. 102 103required: 104 - compatible 105 - reg 106 - interrupts 107 - clocks 108 - clock-names 109 110unevaluatedProperties: false 111 112examples: 113 - | 114 #include <dt-bindings/clock/rk3288-cru.h> 115 #include <dt-bindings/interrupt-controller/arm-gic.h> 116 #include <dt-bindings/interrupt-controller/irq.h> 117 sdmmc: mmc@ff0c0000 { 118 compatible = "rockchip,rk3288-dw-mshc"; 119 reg = <0xff0c0000 0x4000>; 120 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 121 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, 122 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; 123 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; 124 resets = <&cru SRST_MMC0>; 125 reset-names = "reset"; 126 fifo-depth = <0x100>; 127 max-frequency = <150000000>; 128 }; 129 130...
~/
Read-only file preview.