fsl-imx-esdhc.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
  8
  9maintainers:
 10  - Shawn Guo <shawnguo@kernel.org>
 11
 12allOf:
 13  - $ref: sdhci-common.yaml#
 14
 15description: |
 16  The Enhanced Secure Digital Host Controller on Freescale i.MX family
 17  provides an interface for MMC, SD, and SDIO types of memory cards.
 18
 19  This file documents differences between the core properties described
 20  by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
 21
 22properties:
 23  compatible:
 24    oneOf:
 25      - enum:
 26          - fsl,imx25-esdhc
 27          - fsl,imx35-esdhc
 28          - fsl,imx51-esdhc
 29          - fsl,imx53-esdhc
 30          - fsl,imx6q-usdhc
 31          - fsl,imx6sl-usdhc
 32          - fsl,imx6sx-usdhc
 33          - fsl,imx7d-usdhc
 34          - fsl,imx7ulp-usdhc
 35          - fsl,imx8mm-usdhc
 36          - fsl,imxrt1050-usdhc
 37          - nxp,s32g2-usdhc
 38      - items:
 39          - const: fsl,imx50-esdhc
 40          - const: fsl,imx53-esdhc
 41      - items:
 42          - enum:
 43              - fsl,imx6sll-usdhc
 44              - fsl,imx6ull-usdhc
 45              - fsl,imx6ul-usdhc
 46          - const: fsl,imx6sx-usdhc
 47      - items:
 48          - const: fsl,imx7d-usdhc
 49          - const: fsl,imx6sl-usdhc
 50      - items:
 51          - enum:
 52              - fsl,imx8mq-usdhc
 53          - const: fsl,imx7d-usdhc
 54      - items:
 55          - enum:
 56              - fsl,imx8mn-usdhc
 57              - fsl,imx8mp-usdhc
 58              - fsl,imx8ulp-usdhc
 59              - fsl,imx93-usdhc
 60              - fsl,imx94-usdhc
 61              - fsl,imx95-usdhc
 62          - const: fsl,imx8mm-usdhc
 63      - items:
 64          - enum:
 65              - fsl,imx8dxl-usdhc
 66              - fsl,imx8qm-usdhc
 67          - const: fsl,imx8qxp-usdhc
 68      - items:
 69          - enum:
 70              - fsl,imx8mm-usdhc
 71              - fsl,imx8mn-usdhc
 72              - fsl,imx8mp-usdhc
 73              - fsl,imx8qm-usdhc
 74              - fsl,imx8qxp-usdhc
 75          - const: fsl,imx7d-usdhc
 76        deprecated: true
 77      - items:
 78          - enum:
 79              - fsl,imx8mn-usdhc
 80              - fsl,imx8mp-usdhc
 81          - const: fsl,imx8mm-usdhc
 82          - const: fsl,imx7d-usdhc
 83        deprecated: true
 84      - items:
 85          - enum:
 86              - fsl,imx8dxl-usdhc
 87              - fsl,imx8qm-usdhc
 88          - const: fsl,imx8qxp-usdhc
 89          - const: fsl,imx7d-usdhc
 90        deprecated: true
 91      - items:
 92          - enum:
 93              - fsl,imxrt1170-usdhc
 94          - const: fsl,imxrt1050-usdhc
 95      - items:
 96          - const: nxp,s32g3-usdhc
 97          - const: nxp,s32g2-usdhc
 98
 99  reg:
100    maxItems: 1
101
102  interrupts:
103    maxItems: 1
104
105  fsl,wp-controller:
106    description: |
107      boolean, if present, indicate to use controller internal write protection.
108    type: boolean
109
110  fsl,delay-line:
111    $ref: /schemas/types.yaml#/definitions/uint32
112    description: |
113      Specify the number of delay cells for override mode.
114      This is used to set the clock delay for DLL(Delay Line) on override mode
115      to select a proper data sampling window in case the clock quality is not good
116      because the signal path is too long on the board. Please refer to eSDHC/uSDHC
117      chapter, DLL (Delay Line) section in RM for details.
118    default: 0
119
120  voltage-ranges:
121    $ref: /schemas/types.yaml#/definitions/uint32-matrix
122    description: |
123      Specify the voltage range in case there are software transparent level
124      shifters on the outputs of the controller. Two cells are required, first
125      cell specifies minimum slot voltage (mV), second cell specifies maximum
126      slot voltage (mV).
127    items:
128      items:
129        - description: value for minimum slot voltage
130        - description: value for maximum slot voltage
131    maxItems: 1
132
133  fsl,tuning-start-tap:
134    $ref: /schemas/types.yaml#/definitions/uint32
135    description: |
136      Specify the start delay cell point when send first CMD19 in tuning procedure.
137    default: 0
138
139  fsl,tuning-step:
140    $ref: /schemas/types.yaml#/definitions/uint32
141    description: |
142      Specify the increasing delay cell steps in tuning procedure.
143      The uSDHC use one delay cell as default increasing step to do tuning process.
144      This property allows user to change the tuning step to more than one delay
145      cell which is useful for some special boards or cards when the default
146      tuning step can't find the proper delay window within limited tuning retries.
147    default: 0
148
149  fsl,strobe-dll-delay-target:
150    $ref: /schemas/types.yaml#/definitions/uint32
151    description: |
152      Specify the strobe dll control slave delay target.
153      This delay target programming host controller loopback read clock, and this
154      property allows user to change the delay target for the strobe input read clock.
155      If not use this property, driver default set the delay target to value 7.
156      Only eMMC HS400 mode need to take care of this property.
157    default: 0
158
159  clocks:
160    maxItems: 3
161    description:
162      Handle clocks for the sdhc controller.
163
164  clock-names:
165    items:
166      - const: ipg
167      - const: ahb
168      - const: per
169
170  iommus:
171    maxItems: 1
172
173  power-domains:
174    maxItems: 1
175
176  pinctrl-names:
177    oneOf:
178      - minItems: 3
179        items:
180          - const: default
181          - const: state_100mhz
182          - const: state_200mhz
183          - const: sleep
184      - minItems: 2
185        items:
186          - const: default
187          - const: state_100mhz
188          - const: sleep
189      - minItems: 1
190        items:
191          - const: default
192          - const: sleep
193
194required:
195  - compatible
196  - reg
197  - interrupts
198
199unevaluatedProperties: false
200
201examples:
202  - |
203    mmc@70004000 {
204        compatible = "fsl,imx51-esdhc";
205        reg = <0x70004000 0x4000>;
206        interrupts = <1>;
207        fsl,wp-controller;
208    };
209
210    mmc@70008000 {
211        compatible = "fsl,imx51-esdhc";
212        reg = <0x70008000 0x4000>;
213        interrupts = <2>;
214        cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
215        wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
216    };