brcm,bcm6368-gpio-sysctl.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Broadcom BCM6368 GPIO System Controller
  8
  9maintainers:
 10  - Álvaro Fernández Rojas <noltari@gmail.com>
 11  - Jonas Gorski <jonas.gorski@gmail.com>
 12
 13description:
 14  Broadcom BCM6368 SoC GPIO system controller which provides a register map
 15  for controlling the GPIO and pins of the SoC.
 16
 17properties:
 18  "#address-cells": true
 19
 20  "#size-cells": true
 21
 22  compatible:
 23    items:
 24      - const: brcm,bcm6368-gpio-sysctl
 25      - const: syscon
 26      - const: simple-mfd
 27
 28  ranges:
 29    maxItems: 1
 30
 31  reg:
 32    maxItems: 1
 33
 34patternProperties:
 35  "^gpio@[0-9a-f]+$":
 36    # Child node
 37    type: object
 38    $ref: /schemas/gpio/brcm,bcm63xx-gpio.yaml
 39    description:
 40      GPIO controller for the SoC GPIOs. This child node definition
 41      should follow the bindings specified in
 42      Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
 43
 44  "^pinctrl@[0-9a-f]+$":
 45    # Child node
 46    type: object
 47    $ref: /schemas/pinctrl/brcm,bcm6368-pinctrl.yaml
 48    description:
 49      Pin controller for the SoC pins. This child node definition
 50      should follow the bindings specified in
 51      Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml.
 52
 53required:
 54  - "#address-cells"
 55  - compatible
 56  - ranges
 57  - reg
 58  - "#size-cells"
 59
 60additionalProperties: false
 61
 62examples:
 63  - |
 64    syscon@10000080 {
 65      #address-cells = <1>;
 66      #size-cells = <1>;
 67      compatible = "brcm,bcm6368-gpio-sysctl", "syscon", "simple-mfd";
 68      reg = <0x10000080 0x80>;
 69      ranges = <0 0x10000080 0x80>;
 70
 71      gpio@0 {
 72        compatible = "brcm,bcm6368-gpio";
 73        reg-names = "dirout", "dat";
 74        reg = <0x0 0x8>, <0x8 0x8>;
 75
 76        gpio-controller;
 77        gpio-ranges = <&pinctrl 0 0 38>;
 78        #gpio-cells = <2>;
 79      };
 80
 81      pinctrl: pinctrl@18 {
 82        compatible = "brcm,bcm6368-pinctrl";
 83        reg = <0x18 0x4>, <0x38 0x4>;
 84
 85        pinctrl_analog_afe_0: analog_afe_0-pins {
 86          function = "analog_afe_0";
 87          pins = "gpio0";
 88        };
 89
 90        pinctrl_analog_afe_1: analog_afe_1-pins {
 91          function = "analog_afe_1";
 92          pins = "gpio1";
 93        };
 94
 95        pinctrl_sys_irq: sys_irq-pins {
 96          function = "sys_irq";
 97          pins = "gpio2";
 98        };
 99
100        pinctrl_serial_led: serial_led-pins {
101          pinctrl_serial_led_data: serial_led_data-pins {
102            function = "serial_led_data";
103            pins = "gpio3";
104          };
105
106          pinctrl_serial_led_clk: serial_led_clk-pins {
107            function = "serial_led_clk";
108            pins = "gpio4";
109          };
110        };
111
112        pinctrl_inet_led: inet_led-pins {
113          function = "inet_led";
114          pins = "gpio5";
115        };
116
117        pinctrl_ephy0_led: ephy0_led-pins {
118          function = "ephy0_led";
119          pins = "gpio6";
120        };
121
122        pinctrl_ephy1_led: ephy1_led-pins {
123          function = "ephy1_led";
124          pins = "gpio7";
125        };
126
127        pinctrl_ephy2_led: ephy2_led-pins {
128          function = "ephy2_led";
129          pins = "gpio8";
130        };
131
132        pinctrl_ephy3_led: ephy3_led-pins {
133          function = "ephy3_led";
134          pins = "gpio9";
135        };
136
137        pinctrl_robosw_led_data: robosw_led_data-pins {
138          function = "robosw_led_data";
139          pins = "gpio10";
140        };
141
142        pinctrl_robosw_led_clk: robosw_led_clk-pins {
143          function = "robosw_led_clk";
144          pins = "gpio11";
145        };
146
147        pinctrl_robosw_led0: robosw_led0-pins {
148          function = "robosw_led0";
149          pins = "gpio12";
150        };
151
152        pinctrl_robosw_led1: robosw_led1-pins {
153          function = "robosw_led1";
154          pins = "gpio13";
155        };
156
157        pinctrl_usb_device_led: usb_device_led-pins {
158          function = "usb_device_led";
159          pins = "gpio14";
160        };
161
162        pinctrl_pci: pci-pins {
163          pinctrl_pci_req1: pci_req1-pins {
164            function = "pci_req1";
165            pins = "gpio16";
166          };
167
168          pinctrl_pci_gnt1: pci_gnt1-pins {
169            function = "pci_gnt1";
170            pins = "gpio17";
171          };
172
173          pinctrl_pci_intb: pci_intb-pins {
174            function = "pci_intb";
175            pins = "gpio18";
176          };
177
178          pinctrl_pci_req0: pci_req0-pins {
179            function = "pci_req0";
180            pins = "gpio19";
181          };
182
183          pinctrl_pci_gnt0: pci_gnt0-pins {
184            function = "pci_gnt0";
185            pins = "gpio20";
186          };
187        };
188
189        pinctrl_pcmcia: pcmcia-pins {
190          pinctrl_pcmcia_cd1: pcmcia_cd1-pins {
191            function = "pcmcia_cd1";
192            pins = "gpio22";
193          };
194
195          pinctrl_pcmcia_cd2: pcmcia_cd2-pins {
196            function = "pcmcia_cd2";
197            pins = "gpio23";
198          };
199
200          pinctrl_pcmcia_vs1: pcmcia_vs1-pins {
201            function = "pcmcia_vs1";
202            pins = "gpio24";
203          };
204
205          pinctrl_pcmcia_vs2: pcmcia_vs2-pins {
206            function = "pcmcia_vs2";
207            pins = "gpio25";
208          };
209        };
210
211        pinctrl_ebi_cs2: ebi_cs2-pins {
212          function = "ebi_cs2";
213          pins = "gpio26";
214        };
215
216        pinctrl_ebi_cs3: ebi_cs3-pins {
217          function = "ebi_cs3";
218          pins = "gpio27";
219        };
220
221        pinctrl_spi_cs2: spi_cs2-pins {
222          function = "spi_cs2";
223          pins = "gpio28";
224        };
225
226        pinctrl_spi_cs3: spi_cs3-pins {
227          function = "spi_cs3";
228          pins = "gpio29";
229        };
230
231        pinctrl_spi_cs4: spi_cs4-pins {
232          function = "spi_cs4";
233          pins = "gpio30";
234        };
235
236        pinctrl_spi_cs5: spi_cs5-pins {
237          function = "spi_cs5";
238          pins = "gpio31";
239        };
240
241        pinctrl_uart1: uart1-pins {
242          function = "uart1";
243          pins = "uart1_grp";
244        };
245      };
246    };