xlnx,versal-net-ddrmc5.yaml

 1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
 2%YAML 1.2
 3---
 4$id: http://devicetree.org/schemas/memory-controllers/xlnx,versal-net-ddrmc5.yaml#
 5$schema: http://devicetree.org/meta-schemas/core.yaml#
 6
 7title: Xilinx Versal NET Memory Controller
 8
 9maintainers:
10  - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
11
12description:
13  The integrated DDR Memory Controllers (DDRMCs) support both DDR5 and LPDDR5
14  compact and extended  memory interfaces. Versal NET DDR memory controller
15  has an optional ECC support which correct single bit ECC errors and detect
16  double bit ECC errors. It also has support for reporting other errors like
17  MMCM (Mixed-Mode Clock Manager) errors and General software errors.
18
19properties:
20  compatible:
21    const: xlnx,versal-net-ddrmc5
22
23  amd,rproc:
24    $ref: /schemas/types.yaml#/definitions/phandle
25    description:
26      phandle to the remoteproc_r5 rproc node using which APU interacts
27      with remote processor. APU primarily communicates with the RPU for
28      accessing the DDRMC address space and getting error notification.
29
30required:
31  - compatible
32  - amd,rproc
33
34additionalProperties: false
35
36examples:
37  - |
38    memory-controller {
39        compatible = "xlnx,versal-net-ddrmc5";
40        amd,rproc = <&remoteproc_r5>;
41    };