jedec,lpddr2-timings.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-timings.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: LPDDR2 SDRAM AC timing parameters for a given speed-bin
  8
  9maintainers:
 10  - Krzysztof Kozlowski <krzk@kernel.org>
 11
 12properties:
 13  compatible:
 14    const: jedec,lpddr2-timings
 15
 16  max-freq:
 17    $ref: /schemas/types.yaml#/definitions/uint32
 18    description: |
 19      Maximum DDR clock frequency for the speed-bin, in Hz.
 20
 21  min-freq:
 22    $ref: /schemas/types.yaml#/definitions/uint32
 23    description: |
 24      Minimum DDR clock frequency for the speed-bin, in Hz.
 25
 26  tCKESR:
 27    $ref: /schemas/types.yaml#/definitions/uint32
 28    description: |
 29      CKE minimum pulse width during SELF REFRESH (low pulse width during
 30      SELF REFRESH) in pico seconds.
 31
 32  tDQSCK-max:
 33    $ref: /schemas/types.yaml#/definitions/uint32
 34    description: |
 35      DQS output data access time from CK_t/CK_c in pico seconds.
 36
 37  tDQSCK-max-derated:
 38    $ref: /schemas/types.yaml#/definitions/uint32
 39    description: |
 40      DQS output data access time from CK_t/CK_c, temperature de-rated, in pico
 41      seconds.
 42
 43  tFAW:
 44    $ref: /schemas/types.yaml#/definitions/uint32
 45    description: |
 46      Four-bank activate window in pico seconds.
 47
 48  tRAS-max-ns:
 49    description: |
 50      Row active time in nano seconds.
 51
 52  tRAS-min:
 53    $ref: /schemas/types.yaml#/definitions/uint32
 54    description: |
 55      Row active time in pico seconds.
 56
 57  tRCD:
 58    $ref: /schemas/types.yaml#/definitions/uint32
 59    description: |
 60      RAS-to-CAS delay in pico seconds.
 61
 62  tRPab:
 63    $ref: /schemas/types.yaml#/definitions/uint32
 64    description: |
 65      Row precharge time (all banks) in pico seconds.
 66
 67  tRRD:
 68    $ref: /schemas/types.yaml#/definitions/uint32
 69    description: |
 70      Active bank A to active bank B in pico seconds.
 71
 72  tRTP:
 73    $ref: /schemas/types.yaml#/definitions/uint32
 74    description: |
 75      Internal READ to PRECHARGE command delay in pico seconds.
 76
 77  tWR:
 78    $ref: /schemas/types.yaml#/definitions/uint32
 79    description: |
 80      WRITE recovery time in pico seconds.
 81
 82  tWTR:
 83    $ref: /schemas/types.yaml#/definitions/uint32
 84    description: |
 85      Internal WRITE-to-READ command delay in pico seconds.
 86
 87  tXP:
 88    $ref: /schemas/types.yaml#/definitions/uint32
 89    description: |
 90      Exit power-down to next valid command delay in pico seconds.
 91
 92  tZQCL:
 93    $ref: /schemas/types.yaml#/definitions/uint32
 94    description: |
 95      Long calibration time in pico seconds.
 96
 97  tZQCS:
 98    $ref: /schemas/types.yaml#/definitions/uint32
 99    description: |
100      Short calibration time in pico seconds.
101
102  tZQinit:
103    $ref: /schemas/types.yaml#/definitions/uint32
104    description: |
105      Initialization calibration time in pico seconds.
106
107required:
108  - compatible
109  - min-freq
110  - max-freq
111
112additionalProperties: false
113
114examples:
115  - |
116    timings {
117        compatible = "jedec,lpddr2-timings";
118        min-freq = <10000000>;
119        max-freq = <400000000>;
120        tCKESR = <15000>;
121        tDQSCK-max = <5500>;
122        tFAW = <50000>;
123        tRAS-max-ns = <70000>;
124        tRAS-min = <42000>;
125        tRPab = <21000>;
126        tRCD = <18000>;
127        tRRD = <10000>;
128        tRTP = <7500>;
129        tWR = <15000>;
130        tWTR = <7500>;
131        tXP = <7500>;
132        tZQCL = <360000>;
133        tZQCS = <90000>;
134        tZQinit = <1000000>;
135    };