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st,stm32-dcmipp.yaml

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linux-6.19.14/Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml YAML
  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/media/st,stm32-dcmipp.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: STMicroelectronics STM32 DCMIPP Digital Camera Memory Interface Pixel Processor
  8
  9maintainers:
 10  - Hugues Fruchet <hugues.fruchet@foss.st.com>
 11  - Alain Volmat <alain.volmat@foss.st.com>
 12
 13properties:
 14  compatible:
 15    enum:
 16      - st,stm32mp13-dcmipp
 17      - st,stm32mp25-dcmipp
 18
 19  reg:
 20    maxItems: 1
 21
 22  interrupts:
 23    maxItems: 1
 24
 25  clocks:
 26    items:
 27      - description: bus clock
 28      - description: csi clock
 29    minItems: 1
 30
 31  clock-names:
 32    items:
 33      - const: kclk
 34      - const: mclk
 35    minItems: 1
 36
 37  resets:
 38    maxItems: 1
 39
 40  access-controllers:
 41    minItems: 1
 42    maxItems: 2
 43
 44  port:
 45    $ref: /schemas/graph.yaml#/$defs/port-base
 46    unevaluatedProperties: false
 47    description:
 48      DCMIPP supports a single port node with parallel bus.
 49
 50    properties:
 51      endpoint:
 52        $ref: video-interfaces.yaml#
 53        unevaluatedProperties: false
 54
 55        properties:
 56          bus-type:
 57            enum: [4, 5, 6]
 58            default: 5
 59
 60          bus-width:
 61            enum: [8, 10, 12, 14]
 62            default: 8
 63
 64          pclk-sample: true
 65          hsync-active: true
 66          vsync-active: true
 67
 68required:
 69  - compatible
 70  - reg
 71  - interrupts
 72  - clocks
 73  - resets
 74  - port
 75
 76allOf:
 77  - if:
 78      properties:
 79        compatible:
 80          contains:
 81            enum:
 82              - st,stm32mp13-dcmipp
 83    then:
 84      properties:
 85        clocks:
 86          maxItems: 1
 87
 88        clock-names:
 89          maxItems: 1
 90
 91        port:
 92          properties:
 93            endpoint:
 94              properties:
 95                bus-type:
 96                  enum: [5, 6]
 97    else:
 98      properties:
 99        clocks:
100          minItems: 2
101
102        clock-names:
103          minItems: 2
104
105additionalProperties: false
106
107examples:
108  - |
109    #include <dt-bindings/interrupt-controller/arm-gic.h>
110    #include <dt-bindings/clock/stm32mp13-clks.h>
111    #include <dt-bindings/reset/stm32mp13-resets.h>
112    dcmipp@5a000000 {
113        compatible = "st,stm32mp13-dcmipp";
114        reg = <0x5a000000 0x400>;
115        interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
116        resets = <&rcc DCMIPP_R>;
117        clocks = <&rcc DCMIPP_K>;
118
119        port {
120             endpoint {
121                   remote-endpoint = <&mipid02_2>;
122                   bus-width = <8>;
123                   hsync-active = <0>;
124                   vsync-active = <0>;
125                   pclk-sample = <0>;
126             };
127        };
128    };
129
130...
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