samsung,exynos4212-fimc-is.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-is.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS)
  8
  9maintainers:
 10  - Krzysztof Kozlowski <krzk@kernel.org>
 11  - Sylwester Nawrocki <s.nawrocki@samsung.com>
 12
 13description:
 14  The FIMC-IS is a subsystem for processing image signal from an image sensor.
 15  The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
 16  processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
 17  and SPI bus controllers, PWM and ADC.
 18
 19properties:
 20  compatible:
 21    enum:
 22      - samsung,exynos4212-fimc-is
 23
 24  reg:
 25    maxItems: 1
 26
 27  ranges: true
 28
 29  '#address-cells':
 30    const: 1
 31
 32  '#size-cells':
 33    const: 1
 34
 35  clocks:
 36    maxItems: 21
 37
 38  clock-names:
 39    items:
 40      - const: lite0
 41      - const: lite1
 42      - const: ppmuispx
 43      - const: ppmuispmx
 44      - const: isp
 45      - const: drc
 46      - const: fd
 47      - const: mcuisp
 48      - const: gicisp
 49      - const: mcuctl_isp
 50      - const: pwm_isp
 51      - const: ispdiv0
 52      - const: ispdiv1
 53      - const: mcuispdiv0
 54      - const: mcuispdiv1
 55      - const: mpll
 56      - const: aclk200
 57      - const: aclk400mcuisp
 58      - const: div_aclk200
 59      - const: div_aclk400mcuisp
 60      - const: uart
 61
 62  interrupts:
 63    maxItems: 2
 64
 65  iommus:
 66    maxItems: 4
 67
 68  iommu-names:
 69    items:
 70      - const: isp
 71      - const: drc
 72      - const: fd
 73      - const: mcuctl
 74
 75  power-domains:
 76    maxItems: 1
 77
 78  samsung,pmu-syscon:
 79    $ref: /schemas/types.yaml#/definitions/phandle
 80    description:
 81      Power Management Unit (PMU) system controller interface, used to
 82      power/start the ISP.
 83
 84patternProperties:
 85  "^pmu@[0-9a-f]+$":
 86    type: object
 87    additionalProperties: false
 88    deprecated: true
 89    description:
 90      Node representing the SoC's Power Management Unit (duplicated with the
 91      correct PMU node in the SoC). Deprecated, use samsung,pmu-syscon.
 92
 93    properties:
 94      reg:
 95        maxItems: 1
 96
 97    required:
 98      - reg
 99
100  "^i2c-isp@[0-9a-f]+$":
101    type: object
102    $ref: /schemas/i2c/i2c-controller.yaml#
103    unevaluatedProperties: false
104    description:
105      ISP I2C bus controller
106
107    properties:
108      compatible:
109        const: samsung,exynos4212-i2c-isp
110
111      reg:
112        maxItems: 1
113
114      clocks:
115        maxItems: 1
116
117      clock-names:
118        items:
119          - const: i2c_isp
120
121      pinctrl-0: true
122      pinctrl-names:
123        items:
124          - const: default
125
126    required:
127      - compatible
128      - reg
129      - clocks
130      - clock-names
131
132required:
133  - compatible
134  - reg
135  - '#address-cells'
136  - clocks
137  - clock-names
138  - interrupts
139  - ranges
140  - samsung,pmu-syscon
141  - '#size-cells'
142
143additionalProperties: false
144
145examples:
146  - |
147    #include <dt-bindings/clock/exynos4.h>
148    #include <dt-bindings/gpio/gpio.h>
149    #include <dt-bindings/interrupt-controller/arm-gic.h>
150
151    fimc-is@12000000 {
152        compatible = "samsung,exynos4212-fimc-is";
153        reg = <0x12000000 0x260000>;
154        interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
155                     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
156        clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
157                 <&isp_clock CLK_ISP_FIMC_LITE1>,
158                 <&isp_clock CLK_ISP_PPMUISPX>,
159                 <&isp_clock CLK_ISP_PPMUISPMX>,
160                 <&isp_clock CLK_ISP_FIMC_ISP>,
161                 <&isp_clock CLK_ISP_FIMC_DRC>,
162                 <&isp_clock CLK_ISP_FIMC_FD>,
163                 <&isp_clock CLK_ISP_MCUISP>,
164                 <&isp_clock CLK_ISP_GICISP>,
165                 <&isp_clock CLK_ISP_MCUCTL_ISP>,
166                 <&isp_clock CLK_ISP_PWM_ISP>,
167                 <&isp_clock CLK_ISP_DIV_ISP0>,
168                 <&isp_clock CLK_ISP_DIV_ISP1>,
169                 <&isp_clock CLK_ISP_DIV_MCUISP0>,
170                 <&isp_clock CLK_ISP_DIV_MCUISP1>,
171                 <&clock CLK_MOUT_MPLL_USER_T>,
172                 <&clock CLK_ACLK200>,
173                 <&clock CLK_ACLK400_MCUISP>,
174                 <&clock CLK_DIV_ACLK200>,
175                 <&clock CLK_DIV_ACLK400_MCUISP>,
176                 <&clock CLK_UART_ISP_SCLK>;
177        clock-names = "lite0", "lite1", "ppmuispx",
178                      "ppmuispmx", "isp",
179                      "drc", "fd", "mcuisp",
180                      "gicisp", "mcuctl_isp", "pwm_isp",
181                      "ispdiv0", "ispdiv1", "mcuispdiv0",
182                      "mcuispdiv1", "mpll", "aclk200",
183                      "aclk400mcuisp", "div_aclk200",
184                      "div_aclk400mcuisp", "uart";
185        iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
186                 <&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
187        iommu-names = "isp", "drc", "fd", "mcuctl";
188        power-domains = <&pd_isp>;
189        samsung,pmu-syscon = <&pmu_system_controller>;
190
191        #address-cells = <1>;
192        #size-cells = <1>;
193        ranges;
194
195        i2c-isp@12140000 {
196            compatible = "samsung,exynos4212-i2c-isp";
197            reg = <0x12140000 0x100>;
198            clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
199            clock-names = "i2c_isp";
200            pinctrl-0 = <&fimc_is_i2c1>;
201            pinctrl-names = "default";
202            #address-cells = <1>;
203            #size-cells = <0>;
204
205            image-sensor@10 {
206                compatible = "samsung,s5k6a3";
207                reg = <0x10>;
208                svdda-supply = <&cam_io_reg>;
209                svddio-supply = <&ldo19_reg>;
210                afvdd-supply = <&ldo19_reg>;
211                clocks = <&camera 1>;
212                clock-names = "extclk";
213                assigned-clocks = <&camera 1>;
214                assigned-clock-rates = <24000000>;
215                gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
216
217                port {
218                    endpoint {
219                        remote-endpoint = <&csis1_ep>;
220                        data-lanes = <1>;
221                    };
222                };
223            };
224        };
225    };