rockchip,px30-vip.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/media/rockchip,px30-vip.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Rockchip PX30 Video Input Processor (VIP)
  8
  9maintainers:
 10  - Mehdi Djait <mehdi.djait@linux.intel.com>
 11  - Michael Riesch <michael.riesch@collabora.com>
 12
 13description:
 14  The Rockchip PX30 Video Input Processor (VIP) receives the data from a camera
 15  sensor or CCIR656 encoder and transfers it into system main memory by AXI bus.
 16
 17properties:
 18  compatible:
 19    const: rockchip,px30-vip
 20
 21  reg:
 22    maxItems: 1
 23
 24  interrupts:
 25    maxItems: 1
 26
 27  clocks:
 28    items:
 29      - description: ACLK
 30      - description: HCLK
 31      - description: PCLK
 32
 33  clock-names:
 34    items:
 35      - const: aclk
 36      - const: hclk
 37      - const: pclk
 38
 39  resets:
 40    items:
 41      - description: AXI
 42      - description: AHB
 43      - description: PCLK IN
 44
 45  reset-names:
 46    items:
 47      - const: axi
 48      - const: ahb
 49      - const: pclkin
 50
 51  power-domains:
 52    maxItems: 1
 53
 54  ports:
 55    $ref: /schemas/graph.yaml#/properties/ports
 56
 57    properties:
 58      port@0:
 59        $ref: /schemas/graph.yaml#/$defs/port-base
 60        unevaluatedProperties: false
 61        description: input port on the parallel interface
 62
 63        properties:
 64          endpoint:
 65            $ref: video-interfaces.yaml#
 66            unevaluatedProperties: false
 67
 68            properties:
 69              bus-type:
 70                enum:
 71                  - 5 # MEDIA_BUS_TYPE_PARALLEL
 72                  - 6 # MEDIA_BUS_TYPE_BT656
 73
 74            required:
 75              - bus-type
 76
 77    required:
 78      - port@0
 79
 80required:
 81  - compatible
 82  - reg
 83  - interrupts
 84  - clocks
 85  - ports
 86
 87additionalProperties: false
 88
 89examples:
 90  - |
 91    #include <dt-bindings/clock/px30-cru.h>
 92    #include <dt-bindings/interrupt-controller/arm-gic.h>
 93    #include <dt-bindings/media/video-interfaces.h>
 94    #include <dt-bindings/power/px30-power.h>
 95
 96    soc {
 97        #address-cells = <2>;
 98        #size-cells = <2>;
 99
100        video-capture@ff490000 {
101            compatible = "rockchip,px30-vip";
102            reg = <0x0 0xff490000 0x0 0x200>;
103            interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
104            clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>;
105            clock-names = "aclk", "hclk", "pclk";
106            power-domains = <&power PX30_PD_VI>;
107            resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>;
108            reset-names = "axi", "ahb", "pclkin";
109
110            ports {
111                #address-cells = <1>;
112                #size-cells = <0>;
113
114                port@0 {
115                    reg = <0>;
116
117                    cif_in: endpoint {
118                        remote-endpoint = <&tw9900_out>;
119                        bus-type = <MEDIA_BUS_TYPE_BT656>;
120                    };
121                };
122            };
123        };
124    };