renesas,rzg2l-cru.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2# Copyright (C) 2022 Renesas Electronics Corp.
  3%YAML 1.2
  4---
  5$id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml#
  6$schema: http://devicetree.org/meta-schemas/core.yaml#
  7
  8title: Renesas RZ/G2L (and alike SoC's) Camera Data Receiving Unit (CRU) Image processing
  9
 10maintainers:
 11  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
 12
 13description:
 14  The CRU image processing module is a data conversion module equipped with pixel
 15  color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and
 16  parallel (including ITU-R BT.656) input are provided as the image sensor interface.
 17
 18properties:
 19  compatible:
 20    oneOf:
 21      - items:
 22          - enum:
 23              - renesas,r9a07g043-cru       # RZ/G2UL
 24              - renesas,r9a07g044-cru       # RZ/G2{L,LC}
 25              - renesas,r9a07g054-cru       # RZ/V2L
 26          - const: renesas,rzg2l-cru
 27      - const: renesas,r9a09g047-cru        # RZ/G3E
 28
 29  reg:
 30    maxItems: 1
 31
 32  interrupts:
 33    oneOf:
 34      - items:
 35          - description: CRU Interrupt for image_conv
 36          - description: CRU Interrupt for image_conv_err
 37          - description: CRU AXI master error interrupt
 38      - items:
 39          - description: CRU Interrupt for image_conv
 40          - description: CRU AXI master error interrupt
 41          - description: CRU Video Data AXI Master Address 0 Write End interrupt
 42          - description: CRU Statistics data AXI master addr 0 write end interrupt
 43          - description: CRU Video statistics data AXI master addr 0 write end interrupt
 44
 45  interrupt-names:
 46    oneOf:
 47      - items:
 48          - const: image_conv
 49          - const: image_conv_err
 50          - const: axi_mst_err
 51      - items:
 52          - const: image_conv
 53          - const: axi_mst_err
 54          - const: vd_addr_wend
 55          - const: sd_addr_wend
 56          - const: vsd_addr_wend
 57
 58  clocks:
 59    items:
 60      - description: CRU Main clock
 61      - description: CRU Register access clock
 62      - description: CRU image transfer clock
 63
 64  clock-names:
 65    items:
 66      - const: video
 67      - const: apb
 68      - const: axi
 69
 70  power-domains:
 71    maxItems: 1
 72
 73  resets:
 74    items:
 75      - description: CRU_PRESETN reset terminal
 76      - description: CRU_ARESETN reset terminal
 77
 78  reset-names:
 79    items:
 80      - const: presetn
 81      - const: aresetn
 82
 83  ports:
 84    $ref: /schemas/graph.yaml#/properties/ports
 85
 86    properties:
 87      port@0:
 88        $ref: /schemas/graph.yaml#/$defs/port-base
 89        unevaluatedProperties: false
 90        description:
 91          Input port node, single endpoint describing a parallel input source.
 92
 93        properties:
 94          endpoint:
 95            $ref: video-interfaces.yaml#
 96            unevaluatedProperties: false
 97
 98            properties:
 99              hsync-active: true
100              vsync-active: true
101              bus-width: true
102              data-shift: true
103
104      port@1:
105        $ref: /schemas/graph.yaml#/properties/port
106        description:
107          Input port node, describing the Image Processing module connected to the
108          CSI-2 receiver.
109
110required:
111  - compatible
112  - reg
113  - interrupts
114  - interrupt-names
115  - clocks
116  - clock-names
117  - resets
118  - reset-names
119  - power-domains
120
121allOf:
122  - if:
123      properties:
124        compatible:
125          contains:
126            enum:
127              - renesas,r9a07g044-cru
128              - renesas,r9a07g054-cru
129    then:
130      properties:
131        interrupts:
132          maxItems: 3
133        interrupt-names:
134          maxItems: 3
135        ports:
136          required:
137            - port@0
138            - port@1
139
140  - if:
141      properties:
142        compatible:
143          contains:
144            enum:
145              - renesas,r9a07g043-cru
146    then:
147      properties:
148        interrupts:
149          maxItems: 3
150        interrupt-names:
151          maxItems: 3
152        ports:
153          properties:
154            port@0: false
155          required:
156            - port@1
157
158  - if:
159      properties:
160        compatible:
161          contains:
162            const: renesas,r9a09g047-cru
163    then:
164      properties:
165        interrupts:
166          minItems: 5
167        interrupt-names:
168          minItems: 5
169        ports:
170          properties:
171            port@0: false
172          required:
173            - port@1
174
175additionalProperties: false
176
177examples:
178  # Device node example with CSI-2
179  - |
180    #include <dt-bindings/clock/r9a07g044-cpg.h>
181    #include <dt-bindings/interrupt-controller/arm-gic.h>
182
183    cru: video@10830000 {
184        compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru";
185        reg = <0x10830000 0x400>;
186        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
187                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
188                     <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
189        interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
190        clocks = <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
191                 <&cpg CPG_MOD R9A07G044_CRU_PCLK>,
192                 <&cpg CPG_MOD R9A07G044_CRU_ACLK>;
193        clock-names = "video", "apb", "axi";
194        power-domains = <&cpg>;
195        resets = <&cpg R9A07G044_CRU_PRESETN>,
196                 <&cpg R9A07G044_CRU_ARESETN>;
197        reset-names = "presetn", "aresetn";
198
199        ports {
200            #address-cells = <1>;
201            #size-cells = <0>;
202
203            port@0 {
204                #address-cells = <1>;
205                #size-cells = <0>;
206                reg = <0>;
207
208                cru_parallel_in: endpoint@0 {
209                    reg = <0>;
210                    remote-endpoint = <&ov5642>;
211                    hsync-active = <1>;
212                    vsync-active = <1>;
213                };
214            };
215
216            port@1 {
217                #address-cells = <1>;
218                #size-cells = <0>;
219                reg = <1>;
220
221                cru_csi_in: endpoint@0 {
222                    reg = <0>;
223                    remote-endpoint = <&csi_cru_in>;
224                };
225            };
226        };
227    };