renesas,r9a09g057-ivc.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/media/renesas,r9a09g057-ivc.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Renesas RZ/V2H(P) Input Video Control Block
  8
  9maintainers:
 10  - Daniel Scally <dan.scally@ideasonboard.com>
 11
 12description:
 13  The IVC block is a module that takes video frames from memory and feeds them
 14  to the Image Signal Processor for processing.
 15
 16properties:
 17  compatible:
 18    const: renesas,r9a09g057-ivc # RZ/V2H(P)
 19
 20  reg:
 21    maxItems: 1
 22
 23  interrupts:
 24    maxItems: 1
 25
 26  clocks:
 27    items:
 28      - description: Input Video Control block register access clock
 29      - description: Video input data AXI bus clock
 30      - description: ISP system clock
 31
 32  clock-names:
 33    items:
 34      - const: reg
 35      - const: axi
 36      - const: isp
 37
 38  power-domains:
 39    maxItems: 1
 40
 41  resets:
 42    items:
 43      - description: Input Video Control block register access reset
 44      - description: Video input data AXI bus reset
 45      - description: ISP core reset
 46
 47  reset-names:
 48    items:
 49      - const: reg
 50      - const: axi
 51      - const: isp
 52
 53  port:
 54    $ref: /schemas/graph.yaml#/properties/port
 55    description: Output parallel video bus
 56
 57    properties:
 58      endpoint:
 59        $ref: /schemas/graph.yaml#/properties/endpoint
 60
 61required:
 62  - compatible
 63  - reg
 64  - interrupts
 65  - clocks
 66  - clock-names
 67  - power-domains
 68  - resets
 69  - reset-names
 70  - port
 71
 72additionalProperties: false
 73
 74examples:
 75  - |
 76    #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
 77    #include <dt-bindings/interrupt-controller/arm-gic.h>
 78
 79    isp-input@16040000 {
 80      compatible = "renesas,r9a09g057-ivc";
 81      reg = <0x16040000 0x230>;
 82
 83      clocks = <&cpg CPG_MOD 0xe3>,
 84               <&cpg CPG_MOD 0xe4>,
 85               <&cpg CPG_MOD 0xe5>;
 86      clock-names = "reg", "axi", "isp";
 87
 88      power-domains = <&cpg>;
 89
 90      resets = <&cpg 0xd4>,
 91               <&cpg 0xd1>,
 92               <&cpg 0xd3>;
 93      reset-names = "reg", "axi", "isp";
 94
 95      interrupts = <GIC_SPI 861 IRQ_TYPE_EDGE_RISING>;
 96
 97      port {
 98        ivc_out: endpoint {
 99          remote-endpoint = <&isp_in>;
100        };
101      };
102    };
103...