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qcom,qcs8300-camss.yaml
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linux-6.19.14/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/qcom,qcs8300-camss.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm QCS8300 CAMSS ISP 8 9maintainers: 10 - Vikram Sharma <quic_vikramsa@quicinc.com> 11 12description: 13 The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. 14 15properties: 16 compatible: 17 const: qcom,qcs8300-camss 18 19 reg: 20 maxItems: 21 21 22 reg-names: 23 items: 24 - const: csid_wrapper 25 - const: csid0 26 - const: csid1 27 - const: csid_lite0 28 - const: csid_lite1 29 - const: csid_lite2 30 - const: csid_lite3 31 - const: csid_lite4 32 - const: csiphy0 33 - const: csiphy1 34 - const: csiphy2 35 - const: tpg0 36 - const: tpg1 37 - const: tpg2 38 - const: vfe0 39 - const: vfe1 40 - const: vfe_lite0 41 - const: vfe_lite1 42 - const: vfe_lite2 43 - const: vfe_lite3 44 - const: vfe_lite4 45 46 clocks: 47 maxItems: 26 48 49 clock-names: 50 items: 51 - const: camnoc_axi 52 - const: core_ahb 53 - const: cpas_ahb 54 - const: cpas_fast_ahb_clk 55 - const: cpas_vfe_lite 56 - const: cpas_vfe0 57 - const: cpas_vfe1 58 - const: csid 59 - const: csiphy0 60 - const: csiphy0_timer 61 - const: csiphy1 62 - const: csiphy1_timer 63 - const: csiphy2 64 - const: csiphy2_timer 65 - const: csiphy_rx 66 - const: gcc_axi_hf 67 - const: gcc_axi_sf 68 - const: icp_ahb 69 - const: vfe0 70 - const: vfe0_fast_ahb 71 - const: vfe1 72 - const: vfe1_fast_ahb 73 - const: vfe_lite 74 - const: vfe_lite_ahb 75 - const: vfe_lite_cphy_rx 76 - const: vfe_lite_csid 77 78 interrupts: 79 maxItems: 20 80 81 interrupt-names: 82 items: 83 - const: csid0 84 - const: csid1 85 - const: csid_lite0 86 - const: csid_lite1 87 - const: csid_lite2 88 - const: csid_lite3 89 - const: csid_lite4 90 - const: csiphy0 91 - const: csiphy1 92 - const: csiphy2 93 - const: tpg0 94 - const: tpg1 95 - const: tpg2 96 - const: vfe0 97 - const: vfe1 98 - const: vfe_lite0 99 - const: vfe_lite1 100 - const: vfe_lite2 101 - const: vfe_lite3 102 - const: vfe_lite4 103 104 interconnects: 105 maxItems: 2 106 107 interconnect-names: 108 items: 109 - const: ahb 110 - const: hf_0 111 112 iommus: 113 maxItems: 1 114 115 power-domains: 116 items: 117 - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. 118 119 power-domain-names: 120 items: 121 - const: top 122 123 vdda-phy-supply: 124 description: 125 Phandle to a 0.88V regulator supply to CSI PHYs. 126 127 vdda-pll-supply: 128 description: 129 Phandle to 1.2V regulator supply to CSI PHYs pll block. 130 131 ports: 132 $ref: /schemas/graph.yaml#/properties/ports 133 134 description: 135 CSI input ports. 136 137 patternProperties: 138 "^port@[0-2]+$": 139 $ref: /schemas/graph.yaml#/$defs/port-base 140 unevaluatedProperties: false 141 description: 142 Input port for receiving CSI data on CSIPHY 0-2. 143 144 properties: 145 endpoint: 146 $ref: video-interfaces.yaml# 147 unevaluatedProperties: false 148 149 properties: 150 data-lanes: 151 minItems: 1 152 maxItems: 4 153 154 required: 155 - data-lanes 156 157required: 158 - compatible 159 - reg 160 - reg-names 161 - clocks 162 - clock-names 163 - interrupts 164 - interrupt-names 165 - interconnects 166 - interconnect-names 167 - iommus 168 - power-domains 169 - power-domain-names 170 - ports 171 - vdda-phy-supply 172 - vdda-pll-supply 173 174additionalProperties: false 175 176examples: 177 - | 178 #include <dt-bindings/clock/qcom,sa8775p-camcc.h> 179 #include <dt-bindings/clock/qcom,sa8775p-gcc.h> 180 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> 181 #include <dt-bindings/interconnect/qcom,icc.h> 182 #include <dt-bindings/interrupt-controller/arm-gic.h> 183 #include <dt-bindings/power/qcom-rpmpd.h> 184 185 soc { 186 #address-cells = <2>; 187 #size-cells = <2>; 188 189 isp@ac78000 { 190 compatible = "qcom,qcs8300-camss"; 191 192 reg = <0x0 0xac78000 0x0 0x1000>, 193 <0x0 0xac7a000 0x0 0x0f00>, 194 <0x0 0xac7c000 0x0 0x0f00>, 195 <0x0 0xac84000 0x0 0x0f00>, 196 <0x0 0xac88000 0x0 0x0f00>, 197 <0x0 0xac8c000 0x0 0x0f00>, 198 <0x0 0xac90000 0x0 0x0f00>, 199 <0x0 0xac94000 0x0 0x0f00>, 200 <0x0 0xac9c000 0x0 0x2000>, 201 <0x0 0xac9e000 0x0 0x2000>, 202 <0x0 0xaca0000 0x0 0x2000>, 203 <0x0 0xacac000 0x0 0x0400>, 204 <0x0 0xacad000 0x0 0x0400>, 205 <0x0 0xacae000 0x0 0x0400>, 206 <0x0 0xac4d000 0x0 0xd000>, 207 <0x0 0xac60000 0x0 0xd000>, 208 <0x0 0xac85000 0x0 0x0d00>, 209 <0x0 0xac89000 0x0 0x0d00>, 210 <0x0 0xac8d000 0x0 0x0d00>, 211 <0x0 0xac91000 0x0 0x0d00>, 212 <0x0 0xac95000 0x0 0x0d00>; 213 reg-names = "csid_wrapper", 214 "csid0", 215 "csid1", 216 "csid_lite0", 217 "csid_lite1", 218 "csid_lite2", 219 "csid_lite3", 220 "csid_lite4", 221 "csiphy0", 222 "csiphy1", 223 "csiphy2", 224 "tpg0", 225 "tpg1", 226 "tpg2", 227 "vfe0", 228 "vfe1", 229 "vfe_lite0", 230 "vfe_lite1", 231 "vfe_lite2", 232 "vfe_lite3", 233 "vfe_lite4"; 234 235 clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 236 <&camcc CAM_CC_CORE_AHB_CLK>, 237 <&camcc CAM_CC_CPAS_AHB_CLK>, 238 <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, 239 <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, 240 <&camcc CAM_CC_CPAS_IFE_0_CLK>, 241 <&camcc CAM_CC_CPAS_IFE_1_CLK>, 242 <&camcc CAM_CC_CSID_CLK>, 243 <&camcc CAM_CC_CSIPHY0_CLK>, 244 <&camcc CAM_CC_CSI0PHYTIMER_CLK>, 245 <&camcc CAM_CC_CSIPHY1_CLK>, 246 <&camcc CAM_CC_CSI1PHYTIMER_CLK>, 247 <&camcc CAM_CC_CSIPHY2_CLK>, 248 <&camcc CAM_CC_CSI2PHYTIMER_CLK>, 249 <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, 250 <&gcc GCC_CAMERA_HF_AXI_CLK>, 251 <&gcc GCC_CAMERA_SF_AXI_CLK>, 252 <&camcc CAM_CC_ICP_AHB_CLK>, 253 <&camcc CAM_CC_IFE_0_CLK>, 254 <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, 255 <&camcc CAM_CC_IFE_1_CLK>, 256 <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, 257 <&camcc CAM_CC_IFE_LITE_CLK>, 258 <&camcc CAM_CC_IFE_LITE_AHB_CLK>, 259 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, 260 <&camcc CAM_CC_IFE_LITE_CSID_CLK>; 261 clock-names = "camnoc_axi", 262 "core_ahb", 263 "cpas_ahb", 264 "cpas_fast_ahb_clk", 265 "cpas_vfe_lite", 266 "cpas_vfe0", 267 "cpas_vfe1", 268 "csid", 269 "csiphy0", 270 "csiphy0_timer", 271 "csiphy1", 272 "csiphy1_timer", 273 "csiphy2", 274 "csiphy2_timer", 275 "csiphy_rx", 276 "gcc_axi_hf", 277 "gcc_axi_sf", 278 "icp_ahb", 279 "vfe0", 280 "vfe0_fast_ahb", 281 "vfe1", 282 "vfe1_fast_ahb", 283 "vfe_lite", 284 "vfe_lite_ahb", 285 "vfe_lite_cphy_rx", 286 "vfe_lite_csid"; 287 288 interrupts = <GIC_SPI 565 IRQ_TYPE_EDGE_RISING>, 289 <GIC_SPI 564 IRQ_TYPE_EDGE_RISING>, 290 <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, 291 <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>, 292 <GIC_SPI 759 IRQ_TYPE_EDGE_RISING>, 293 <GIC_SPI 758 IRQ_TYPE_EDGE_RISING>, 294 <GIC_SPI 604 IRQ_TYPE_EDGE_RISING>, 295 <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, 296 <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, 297 <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, 298 <GIC_SPI 545 IRQ_TYPE_EDGE_RISING>, 299 <GIC_SPI 546 IRQ_TYPE_EDGE_RISING>, 300 <GIC_SPI 547 IRQ_TYPE_EDGE_RISING>, 301 <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, 302 <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, 303 <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, 304 <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>, 305 <GIC_SPI 761 IRQ_TYPE_EDGE_RISING>, 306 <GIC_SPI 760 IRQ_TYPE_EDGE_RISING>, 307 <GIC_SPI 605 IRQ_TYPE_EDGE_RISING>; 308 interrupt-names = "csid0", 309 "csid1", 310 "csid_lite0", 311 "csid_lite1", 312 "csid_lite2", 313 "csid_lite3", 314 "csid_lite4", 315 "csiphy0", 316 "csiphy1", 317 "csiphy2", 318 "tpg0", 319 "tpg1", 320 "tpg2", 321 "vfe0", 322 "vfe1", 323 "vfe_lite0", 324 "vfe_lite1", 325 "vfe_lite2", 326 "vfe_lite3", 327 "vfe_lite4"; 328 329 interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY 330 &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, 331 <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS 332 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; 333 interconnect-names = "ahb", 334 "hf_0"; 335 336 iommus = <&apps_smmu 0x2400 0x20>; 337 338 power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; 339 power-domain-names = "top"; 340 341 vdda-phy-supply = <&vreg_l4a_0p88>; 342 vdda-pll-supply = <&vreg_l1c_1p2>; 343 344 ports { 345 #address-cells = <1>; 346 #size-cells = <0>; 347 }; 348 }; 349 };
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