nxp,imx8-isi.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: i.MX8 Image Sensing Interface
  8
  9maintainers:
 10  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 11
 12description: |
 13  The Image Sensing Interface (ISI) combines image processing pipelines with
 14  DMA engines to process and capture frames originating from a variety of
 15  sources. The inputs to the ISI go through Pixel Link interfaces, and their
 16  number and nature is SoC-dependent. They cover both capture interfaces (MIPI
 17  CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
 18
 19properties:
 20  compatible:
 21    enum:
 22      - fsl,imx8mn-isi
 23      - fsl,imx8mp-isi
 24      - fsl,imx8ulp-isi
 25      - fsl,imx91-isi
 26      - fsl,imx93-isi
 27
 28  reg:
 29    maxItems: 1
 30
 31  clocks:
 32    items:
 33      - description: The AXI clock
 34      - description: The APB clock
 35      # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified
 36      # as well, in case some SoCs have the ability to control them separately.
 37      # This may be the case of the i.MX8[DQ]X(P)
 38
 39  clock-names:
 40    items:
 41      - const: axi
 42      - const: apb
 43
 44  fsl,blk-ctrl:
 45    $ref: /schemas/types.yaml#/definitions/phandle
 46    description:
 47      A phandle referencing the block control that contains the CSIS to ISI
 48      gasket.
 49
 50  interrupts:
 51    description: Processing pipeline interrupts, one per pipeline
 52    minItems: 1
 53    maxItems: 2
 54
 55  power-domains:
 56    maxItems: 1
 57
 58  ports:
 59    $ref: /schemas/graph.yaml#/properties/ports
 60    description: |
 61      Ports represent the Pixel Link inputs to the ISI. Their number and
 62      assignment are model-dependent. Each port shall have a single endpoint.
 63
 64required:
 65  - compatible
 66  - reg
 67  - interrupts
 68  - clocks
 69  - clock-names
 70  - ports
 71
 72allOf:
 73  - if:
 74      properties:
 75        compatible:
 76          contains:
 77            enum:
 78              - fsl,imx8mn-isi
 79              - fsl,imx8ulp-isi
 80              - fsl,imx91-isi
 81              - fsl,imx93-isi
 82    then:
 83      properties:
 84        interrupts:
 85          maxItems: 1
 86        ports:
 87          properties:
 88            port@0:
 89              description: MIPI CSI-2 RX
 90            port@1: false
 91          required:
 92            - port@0
 93
 94  - if:
 95      properties:
 96        compatible:
 97          contains:
 98            const: fsl,imx8mp-isi
 99    then:
100      properties:
101        interrupts:
102          maxItems: 2
103        ports:
104          properties:
105            port@0:
106              description: MIPI CSI-2 RX 0
107            port@1:
108              description: MIPI CSI-2 RX 1
109          required:
110            - port@0
111            - port@1
112
113  - if:
114      properties:
115        compatible:
116          not:
117            contains:
118              const: fsl,imx91-isi
119    then:
120      required:
121        - fsl,blk-ctrl
122
123additionalProperties: false
124
125examples:
126  - |
127    #include <dt-bindings/clock/imx8mn-clock.h>
128    #include <dt-bindings/interrupt-controller/arm-gic.h>
129    #include <dt-bindings/interrupt-controller/irq.h>
130    #include <dt-bindings/power/imx8mn-power.h>
131
132    isi@32e20000 {
133        compatible = "fsl,imx8mn-isi";
134        reg = <0x32e20000 0x100>;
135        interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
136        clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
137                 <&clk IMX8MN_CLK_DISP_APB_ROOT>;
138        clock-names = "axi", "apb";
139        fsl,blk-ctrl = <&disp_blk_ctrl>;
140        power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_ISI>;
141
142        ports {
143            #address-cells = <1>;
144            #size-cells = <0>;
145
146            port@0 {
147                reg = <0>;
148                isi_in: endpoint {
149                    remote-endpoint = <&mipi_csi_out>;
150                };
151            };
152        };
153    };
154
155  - |
156    #include <dt-bindings/clock/imx8mp-clock.h>
157    #include <dt-bindings/interrupt-controller/arm-gic.h>
158    #include <dt-bindings/interrupt-controller/irq.h>
159
160    isi@32e00000 {
161        compatible = "fsl,imx8mp-isi";
162        reg = <0x32e00000 0x4000>;
163        interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
164                     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
165        clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
166                 <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
167        clock-names = "axi", "apb";
168        fsl,blk-ctrl = <&media_blk_ctrl>;
169        power-domains = <&mediamix_pd>;
170
171        ports {
172            #address-cells = <1>;
173            #size-cells = <0>;
174
175            port@0 {
176                reg = <0>;
177                isi_in_0: endpoint {
178                    remote-endpoint = <&mipi_csi_0_out>;
179                };
180            };
181
182            port@1 {
183                reg = <1>;
184                isi_in_1: endpoint {
185                    remote-endpoint = <&mipi_csi_1_out>;
186                };
187            };
188        };
189    };
190...