mediatek,mt8173-vpu.yaml

 1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
 2%YAML 1.2
 3---
 4$id: http://devicetree.org/schemas/media/mediatek,mt8173-vpu.yaml#
 5$schema: http://devicetree.org/meta-schemas/core.yaml#
 6
 7title: Mediatek MT8173 Video Processor Unit
 8
 9maintainers:
10  - Ariel D'Alessandro <ariel.dalessandro@collabora.com>
11
12description:
13  Video Processor Unit is a HW video controller. It controls HW Codec including
14  H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color
15  convert).
16
17properties:
18  compatible:
19    const: mediatek,mt8173-vpu
20
21  reg:
22    maxItems: 2
23
24  reg-names:
25    items:
26      - const: tcm
27      - const: cfg_reg
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    maxItems: 1
34
35  clock-names:
36    items:
37      - const: main
38
39  memory-region:
40    maxItems: 1
41
42required:
43  - compatible
44  - reg
45  - reg-names
46  - interrupts
47  - clocks
48  - clock-names
49  - memory-region
50
51additionalProperties: false
52
53examples:
54  - |
55    #include <dt-bindings/clock/mt8173-clk.h>
56    #include <dt-bindings/interrupt-controller/arm-gic.h>
57
58    soc {
59        #address-cells = <2>;
60        #size-cells = <2>;
61
62        vpu: vpu@10020000 {
63            compatible = "mediatek,mt8173-vpu";
64            reg = <0 0x10020000 0 0x30000>,
65                  <0 0x10050000 0 0x100>;
66            reg-names = "tcm", "cfg_reg";
67            interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
68            clocks = <&topckgen CLK_TOP_SCP_SEL>;
69            clock-names = "main";
70            memory-region = <&vpu_dma_reserved>;
71        };
72    };
73
74...