mediatek,mdp3-tcc.yaml

 1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 2%YAML 1.2
 3---
 4$id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml#
 5$schema: http://devicetree.org/meta-schemas/core.yaml#
 6
 7title: MediaTek Media Data Path 3 Tone Curve Conversion
 8
 9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12description:
13  Tone Curve Conversion (TCC) is one of Media Profile Path 3 (MDP3) components.
14  It is used to handle the tone mapping of various gamma curves in order to
15  achieve HDR10 effects. This helps adapt the content to the color and
16  brightness range that standard display devices typically support.
17
18properties:
19  compatible:
20    oneOf:
21      - enum:
22          - mediatek,mt8195-mdp3-tcc
23      - items:
24          - const: mediatek,mt8188-mdp3-tcc
25          - const: mediatek,mt8195-mdp3-tcc
26
27  reg:
28    maxItems: 1
29
30  mediatek,gce-client-reg:
31    description:
32      The register of display function block to be set by gce. There are 4 arguments,
33      such as gce node, subsys id, offset and register size. The subsys id that is
34      mapping to the register of display function blocks is defined in the gce header
35      include/dt-bindings/gce/<chip>-gce.h of each chips.
36    $ref: /schemas/types.yaml#/definitions/phandle-array
37    items:
38      items:
39        - description: phandle of GCE
40        - description: GCE subsys id
41        - description: register offset
42        - description: register size
43    maxItems: 1
44
45  clocks:
46    maxItems: 1
47
48required:
49  - compatible
50  - reg
51  - mediatek,gce-client-reg
52  - clocks
53
54additionalProperties: false
55
56examples:
57  - |
58    #include <dt-bindings/clock/mt8195-clk.h>
59    #include <dt-bindings/gce/mt8195-gce.h>
60
61    display@1400b000 {
62        compatible = "mediatek,mt8195-mdp3-tcc";
63        reg = <0x1400b000 0x1000>;
64        mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
65        clocks = <&vppsys0 CLK_VPP0_MDP_TCC>;
66    };