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samsung,s5k5baf.yaml

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linux-6.19.14/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml YAML
  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/media/i2c/samsung,s5k5baf.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP
  8
  9maintainers:
 10  - Krzysztof Kozlowski <krzk@kernel.org>
 11
 12properties:
 13  compatible:
 14    const: samsung,s5k5baf
 15
 16  reg:
 17    maxItems: 1
 18
 19  clocks:
 20    maxItems: 1
 21
 22  clock-names:
 23    items:
 24      - const: mclk
 25
 26  clock-frequency:
 27    default: 24000000
 28    description: mclk clock frequency
 29    deprecated: true
 30
 31  rstn-gpios:
 32    maxItems: 1
 33    description: RSTN pin
 34
 35  stbyn-gpios:
 36    maxItems: 1
 37    description: STDBYN pin
 38
 39  vdda-supply:
 40    description: Analog power supply 2.8V (2.6V to 3.0V)
 41
 42  vddio-supply:
 43    description: I/O power supply 1.8V (1.65V to 1.95V) or 2.8V (2.5V to 3.1V)
 44
 45  vddreg-supply:
 46    description:
 47      Regulator input power supply 1.8V (1.7V to 1.9V) or 2.8V (2.6V to 3.0)
 48
 49  port:
 50    $ref: /schemas/graph.yaml#/$defs/port-base
 51    additionalProperties: false
 52
 53    properties:
 54      endpoint:
 55        $ref: /schemas/media/video-interfaces.yaml#
 56        unevaluatedProperties: false
 57
 58        properties:
 59          data-lanes:
 60            items:
 61              - const: 1
 62
 63required:
 64  - compatible
 65  - clocks
 66  - clock-names
 67  - rstn-gpios
 68  - stbyn-gpios
 69  - vdda-supply
 70  - vddio-supply
 71  - vddreg-supply
 72
 73additionalProperties: false
 74
 75examples:
 76  - |
 77    #include <dt-bindings/gpio/gpio.h>
 78
 79    i2c {
 80        #address-cells = <1>;
 81        #size-cells = <0>;
 82
 83        sensor@2d {
 84            compatible = "samsung,s5k5baf";
 85            reg = <0x2d>;
 86
 87            clocks = <&camera 0>;
 88            assigned-clocks = <&camera 0>;
 89            assigned-clock-rates = <24000000>;
 90
 91            clock-names = "mclk";
 92            rstn-gpios = <&gpl2 1 GPIO_ACTIVE_LOW>;
 93            stbyn-gpios = <&gpl2 0 GPIO_ACTIVE_LOW>;
 94            vdda-supply = <&cam_io_en_reg>;
 95            vddio-supply = <&vtcam_reg>;
 96            vddreg-supply = <&vt_core_15v_reg>;
 97
 98            port {
 99                endpoint {
100                    remote-endpoint = <&csis1_ep>;
101                    data-lanes = <1>;
102                };
103            };
104        };
105    };
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