mediatek,mt8196-gpueb-mbox.yaml

 1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
 2%YAML 1.2
 3---
 4$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-gpueb-mbox.yaml#
 5$schema: http://devicetree.org/meta-schemas/core.yaml#
 6
 7title: MediaTek MFlexGraphics GPUEB Mailbox Controller
 8
 9maintainers:
10  - Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
11
12properties:
13  compatible:
14    enum:
15      - mediatek,mt8196-gpueb-mbox
16
17  reg:
18    items:
19      - description: mailbox data registers
20      - description: mailbox control registers
21
22  reg-names:
23    items:
24      - const: data
25      - const: ctl
26
27  clocks:
28    items:
29      - description: main clock of the GPUEB MCU
30
31  interrupts:
32    items:
33      - description: fires when a new message is received
34
35  "#mbox-cells":
36    const: 1
37    description:
38      The number of the mailbox channel.
39
40required:
41  - compatible
42  - reg
43  - reg-names
44  - clocks
45  - interrupts
46  - "#mbox-cells"
47
48additionalProperties: false
49
50examples:
51  - |
52    #include <dt-bindings/clock/mediatek,mt8196-clock.h>
53    #include <dt-bindings/interrupt-controller/arm-gic.h>
54    #include <dt-bindings/interrupt-controller/irq.h>
55
56    mailbox@4b09fd80 {
57        compatible = "mediatek,mt8196-gpueb-mbox";
58        reg = <0x4b09fd80 0x280>,
59              <0x4b170000 0x7c>;
60        reg-names = "data", "ctl";
61        clocks = <&topckgen CLK_TOP_MFG_EB>;
62        interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH 0>;
63        #mbox-cells = <1>;
64    };