renesas,rzv2h-icu.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/interrupt-controller/renesas,rzv2h-icu.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Renesas RZ/{G3E,V2H(P)} Interrupt Control Unit
  8
  9maintainers:
 10  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
 11  - Geert Uytterhoeven <geert+renesas@glider.be>
 12
 13allOf:
 14  - $ref: /schemas/interrupt-controller.yaml#
 15
 16description:
 17  The Interrupt Control Unit (ICU) handles external interrupts (NMI, IRQ, and
 18  TINT), error interrupts, DMAC requests, GPT interrupts, and internal
 19  interrupts.
 20
 21properties:
 22  compatible:
 23    enum:
 24      - renesas,r9a09g047-icu # RZ/G3E
 25      - renesas,r9a09g057-icu # RZ/V2H(P)
 26
 27  '#interrupt-cells':
 28    description: The first cell is the SPI number of the NMI or the
 29      PORT_IRQ[0-15] interrupt, as per user manual. The second cell is used to
 30      specify the flag.
 31    const: 2
 32
 33  '#address-cells':
 34    const: 0
 35
 36  interrupt-controller: true
 37
 38  reg:
 39    maxItems: 1
 40
 41  interrupts:
 42    minItems: 58
 43    items:
 44      - description: NMI interrupt
 45      - description: PORT_IRQ0 interrupt
 46      - description: PORT_IRQ1 interrupt
 47      - description: PORT_IRQ2 interrupt
 48      - description: PORT_IRQ3 interrupt
 49      - description: PORT_IRQ4 interrupt
 50      - description: PORT_IRQ5 interrupt
 51      - description: PORT_IRQ6 interrupt
 52      - description: PORT_IRQ7 interrupt
 53      - description: PORT_IRQ8 interrupt
 54      - description: PORT_IRQ9 interrupt
 55      - description: PORT_IRQ10 interrupt
 56      - description: PORT_IRQ11 interrupt
 57      - description: PORT_IRQ12 interrupt
 58      - description: PORT_IRQ13 interrupt
 59      - description: PORT_IRQ14 interrupt
 60      - description: PORT_IRQ15 interrupt
 61      - description: GPIO interrupt, TINT0
 62      - description: GPIO interrupt, TINT1
 63      - description: GPIO interrupt, TINT2
 64      - description: GPIO interrupt, TINT3
 65      - description: GPIO interrupt, TINT4
 66      - description: GPIO interrupt, TINT5
 67      - description: GPIO interrupt, TINT6
 68      - description: GPIO interrupt, TINT7
 69      - description: GPIO interrupt, TINT8
 70      - description: GPIO interrupt, TINT9
 71      - description: GPIO interrupt, TINT10
 72      - description: GPIO interrupt, TINT11
 73      - description: GPIO interrupt, TINT12
 74      - description: GPIO interrupt, TINT13
 75      - description: GPIO interrupt, TINT14
 76      - description: GPIO interrupt, TINT15
 77      - description: GPIO interrupt, TINT16
 78      - description: GPIO interrupt, TINT17
 79      - description: GPIO interrupt, TINT18
 80      - description: GPIO interrupt, TINT19
 81      - description: GPIO interrupt, TINT20
 82      - description: GPIO interrupt, TINT21
 83      - description: GPIO interrupt, TINT22
 84      - description: GPIO interrupt, TINT23
 85      - description: GPIO interrupt, TINT24
 86      - description: GPIO interrupt, TINT25
 87      - description: GPIO interrupt, TINT26
 88      - description: GPIO interrupt, TINT27
 89      - description: GPIO interrupt, TINT28
 90      - description: GPIO interrupt, TINT29
 91      - description: GPIO interrupt, TINT30
 92      - description: GPIO interrupt, TINT31
 93      - description: Software interrupt, INTA55_0
 94      - description: Software interrupt, INTA55_1
 95      - description: Software interrupt, INTA55_2
 96      - description: Software interrupt, INTA55_3
 97      - description: Error interrupt to CA55
 98      - description: GTCCRA compare match/input capture (U0)
 99      - description: GTCCRB compare match/input capture (U0)
100      - description: GTCCRA compare match/input capture (U1)
101      - description: GTCCRB compare match/input capture (U1)
102
103  interrupt-names:
104    minItems: 58
105    items:
106      - const: nmi
107      - const: port_irq0
108      - const: port_irq1
109      - const: port_irq2
110      - const: port_irq3
111      - const: port_irq4
112      - const: port_irq5
113      - const: port_irq6
114      - const: port_irq7
115      - const: port_irq8
116      - const: port_irq9
117      - const: port_irq10
118      - const: port_irq11
119      - const: port_irq12
120      - const: port_irq13
121      - const: port_irq14
122      - const: port_irq15
123      - const: tint0
124      - const: tint1
125      - const: tint2
126      - const: tint3
127      - const: tint4
128      - const: tint5
129      - const: tint6
130      - const: tint7
131      - const: tint8
132      - const: tint9
133      - const: tint10
134      - const: tint11
135      - const: tint12
136      - const: tint13
137      - const: tint14
138      - const: tint15
139      - const: tint16
140      - const: tint17
141      - const: tint18
142      - const: tint19
143      - const: tint20
144      - const: tint21
145      - const: tint22
146      - const: tint23
147      - const: tint24
148      - const: tint25
149      - const: tint26
150      - const: tint27
151      - const: tint28
152      - const: tint29
153      - const: tint30
154      - const: tint31
155      - const: int-ca55-0
156      - const: int-ca55-1
157      - const: int-ca55-2
158      - const: int-ca55-3
159      - const: icu-error-ca55
160      - const: gpt-u0-gtciada
161      - const: gpt-u0-gtciadb
162      - const: gpt-u1-gtciada
163      - const: gpt-u1-gtciadb
164
165  clocks:
166    maxItems: 1
167
168  power-domains:
169    maxItems: 1
170
171  resets:
172    maxItems: 1
173
174required:
175  - compatible
176  - reg
177  - '#interrupt-cells'
178  - '#address-cells'
179  - interrupt-controller
180  - interrupts
181  - interrupt-names
182  - clocks
183  - power-domains
184  - resets
185
186unevaluatedProperties: false
187
188examples:
189  - |
190    #include <dt-bindings/interrupt-controller/arm-gic.h>
191    #include <dt-bindings/clock/renesas-cpg-mssr.h>
192
193    icu: interrupt-controller@10400000 {
194        compatible = "renesas,r9a09g057-icu";
195        reg = <0x10400000 0x10000>;
196        #interrupt-cells = <2>;
197        #address-cells = <0>;
198        interrupt-controller;
199        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
200                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
201                     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
202                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
203                     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
204                     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
205                     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
206                     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
207                     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
208                     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
209                     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
210                     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
211                     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
212                     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
213                     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
214                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
215                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
216                     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
217                     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
218                     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
219                     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
220                     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
221                     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
222                     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
223                     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
224                     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
225                     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
226                     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
227                     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
228                     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
229                     <GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
230                     <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>,
231                     <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
232                     <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>,
233                     <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>,
234                     <GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>,
235                     <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>,
236                     <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>,
237                     <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>,
238                     <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>,
239                     <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>,
240                     <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>,
241                     <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
242                     <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>,
243                     <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>,
244                     <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>,
245                     <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
246                     <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
247                     <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
248                     <GIC_SPI 262 IRQ_TYPE_EDGE_RISING>,
249                     <GIC_SPI 263 IRQ_TYPE_EDGE_RISING>,
250                     <GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
251                     <GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
252                     <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
253                     <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
254                     <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
255                     <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
256                     <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>;
257        interrupt-names = "nmi",
258                          "port_irq0", "port_irq1", "port_irq2",
259                          "port_irq3", "port_irq4", "port_irq5",
260                          "port_irq6", "port_irq7", "port_irq8",
261                          "port_irq9", "port_irq10", "port_irq11",
262                          "port_irq12", "port_irq13", "port_irq14",
263                          "port_irq15",
264                          "tint0", "tint1", "tint2", "tint3",
265                          "tint4", "tint5", "tint6", "tint7",
266                          "tint8", "tint9", "tint10", "tint11",
267                          "tint12", "tint13", "tint14", "tint15",
268                          "tint16", "tint17", "tint18", "tint19",
269                          "tint20", "tint21", "tint22", "tint23",
270                          "tint24", "tint25", "tint26", "tint27",
271                          "tint28", "tint29", "tint30", "tint31",
272                          "int-ca55-0", "int-ca55-1",
273                          "int-ca55-2", "int-ca55-3",
274                          "icu-error-ca55",
275                          "gpt-u0-gtciada", "gpt-u0-gtciadb",
276                          "gpt-u1-gtciada", "gpt-u1-gtciadb";
277        clocks = <&cpg CPG_MOD 0x5>;
278        power-domains = <&cpg>;
279        resets = <&cpg 0x36>;
280    };