fsl,ls-extirq.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale Layerscape External Interrupt Controller
  8
  9maintainers:
 10  - Shawn Guo <shawnguo@kernel.org>
 11
 12description: |
 13  Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA,
 14  LX216xA) support inverting the polarity of certain external interrupt
 15  lines.
 16
 17properties:
 18  compatible:
 19    oneOf:
 20      - enum:
 21          - fsl,ls1021a-extirq
 22          - fsl,ls1043a-extirq
 23          - fsl,ls1088a-extirq
 24      - items:
 25          - enum:
 26              - fsl,ls1046a-extirq
 27          - const: fsl,ls1043a-extirq
 28      - items:
 29          - enum:
 30              - fsl,ls2080a-extirq
 31              - fsl,lx2160a-extirq
 32          - const: fsl,ls1088a-extirq
 33
 34  '#interrupt-cells':
 35    const: 2
 36
 37  '#address-cells':
 38    const: 0
 39
 40  interrupt-controller: true
 41
 42  reg:
 43    maxItems: 1
 44    description:
 45      Specifies the Interrupt Polarity Control Register (INTPCR) in the
 46      SCFG or the External Interrupt Control Register (IRQCR) in the ISC.
 47
 48  interrupt-map:
 49    description: Specifies the mapping from external interrupts to GIC interrupts.
 50
 51  interrupt-map-mask: true
 52
 53required:
 54  - compatible
 55  - '#interrupt-cells'
 56  - '#address-cells'
 57  - interrupt-controller
 58  - reg
 59  - interrupt-map
 60  - interrupt-map-mask
 61
 62allOf:
 63  - if:
 64      properties:
 65        compatible:
 66          contains:
 67            enum:
 68              - fsl,ls1021a-extirq
 69    then:
 70      properties:
 71        interrupt-map:
 72          minItems: 6
 73          maxItems: 6
 74        interrupt-map-mask:
 75          items:
 76            - const: 0x7
 77            - const: 0
 78  - if:
 79      properties:
 80        compatible:
 81          contains:
 82            enum:
 83              - fsl,ls1043a-extirq
 84              - fsl,ls1046a-extirq
 85    then:
 86      properties:
 87        interrupt-map:
 88          minItems: 12
 89          maxItems: 12
 90        interrupt-map-mask:
 91          items:
 92            - const: 0xf
 93            - const: 0
 94
 95  - if:
 96      properties:
 97        compatible:
 98          contains:
 99            enum:
100              - fsl,ls1088a-extirq
101              - fsl,ls2080a-extirq
102              - fsl,lx2160a-extirq
103# The driver(drivers/irqchip/irq-ls-extirq.c) have not use standard DT
104# function to parser interrupt-map. So it doesn't consider '#address-size'
105# in parent interrupt controller, such as GIC.
106#
107# When dt-binding verify interrupt-map, item data matrix is spitted at
108# incorrect position. Remove interrupt-map restriction because it always
109# wrong.
110
111    then:
112      properties:
113        interrupt-map-mask:
114          items:
115            - const: 0xf
116            - const: 0
117
118additionalProperties: false
119
120examples:
121  - |
122    #include <dt-bindings/interrupt-controller/arm-gic.h>
123    interrupt-controller@1ac {
124            compatible = "fsl,ls1021a-extirq";
125            #interrupt-cells = <2>;
126            #address-cells = <0>;
127            interrupt-controller;
128            reg = <0x1ac 4>;
129            interrupt-map =
130                    <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
131                    <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
132                    <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
133                    <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
134                    <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
135                    <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
136            interrupt-map-mask = <0x7 0x0>;
137    };