fsl,irqsteer.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale IRQSTEER Interrupt Multiplexer
  8
  9maintainers:
 10  - Lucas Stach <l.stach@pengutronix.de>
 11
 12properties:
 13  compatible:
 14    oneOf:
 15      - const: fsl,imx-irqsteer
 16      - items:
 17          - enum:
 18              - fsl,imx8m-irqsteer
 19              - fsl,imx8mp-irqsteer
 20              - fsl,imx8qm-irqsteer
 21              - fsl,imx8qxp-irqsteer
 22              - fsl,imx94-irqsteer
 23              - fsl,imx95-irqsteer
 24          - const: fsl,imx-irqsteer
 25
 26  reg:
 27    maxItems: 1
 28
 29  interrupts:
 30    description: |
 31      should contain the up to 8 parent interrupt lines used to multiplex
 32      the input interrupts. They should be specified sequentially from
 33      output 0 to 7.
 34    items:
 35      - description: output interrupt 0
 36      - description: output interrupt 1
 37      - description: output interrupt 2
 38      - description: output interrupt 3
 39      - description: output interrupt 4
 40      - description: output interrupt 5
 41      - description: output interrupt 6
 42      - description: output interrupt 7
 43    minItems: 1
 44
 45  clocks:
 46    maxItems: 1
 47
 48  clock-names:
 49    const: ipg
 50
 51  power-domains:
 52    maxItems: 1
 53
 54  interrupt-controller: true
 55
 56  "#interrupt-cells":
 57    const: 1
 58
 59  fsl,channel:
 60    $ref: /schemas/types.yaml#/definitions/uint32
 61    description: |
 62      u32 value representing the output channel that all input IRQs should be
 63      steered into.
 64
 65  fsl,num-irqs:
 66    $ref: /schemas/types.yaml#/definitions/uint32
 67    description: |
 68      u32 value representing the number of input interrupts of this channel,
 69      should be multiple of 32 input interrupts and up to 512 interrupts.
 70
 71required:
 72  - compatible
 73  - reg
 74  - interrupts
 75  - clocks
 76  - clock-names
 77  - interrupt-controller
 78  - "#interrupt-cells"
 79  - fsl,channel
 80  - fsl,num-irqs
 81
 82allOf:
 83  - if:
 84      properties:
 85        compatible:
 86          contains:
 87            enum:
 88              - fsl,imx8mp-irqsteer
 89              - fsl,imx8qm-irqsteer
 90              - fsl,imx8qxp-irqsteer
 91              - fsl,imx95-irqsteer
 92    then:
 93      required:
 94        - power-domains
 95    else:
 96      properties:
 97        power-domains: false
 98
 99additionalProperties: false
100
101examples:
102  - |
103    #include <dt-bindings/clock/imx8mq-clock.h>
104    #include <dt-bindings/interrupt-controller/arm-gic.h>
105
106    interrupt-controller@32e2d000 {
107        compatible = "fsl,imx-irqsteer";
108        reg = <0x32e2d000 0x1000>;
109        interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
110        clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
111        clock-names = "ipg";
112        fsl,channel = <0>;
113        fsl,num-irqs = <64>;
114        interrupt-controller;
115        #interrupt-cells = <1>;
116    };