qcom,sa8775p-rpmh.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P
  8
  9maintainers:
 10  - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
 11
 12description: |
 13  RPMh interconnect providers support system bandwidth requirements through
 14  RPMh hardware accelerators known as Bus Clock Manager (BCM).
 15
 16  See also: include/dt-bindings/interconnect/qcom,sa8775p.h
 17
 18properties:
 19  compatible:
 20    enum:
 21      - qcom,sa8775p-aggre1-noc
 22      - qcom,sa8775p-aggre2-noc
 23      - qcom,sa8775p-clk-virt
 24      - qcom,sa8775p-config-noc
 25      - qcom,sa8775p-dc-noc
 26      - qcom,sa8775p-gem-noc
 27      - qcom,sa8775p-gpdsp-anoc
 28      - qcom,sa8775p-lpass-ag-noc
 29      - qcom,sa8775p-mc-virt
 30      - qcom,sa8775p-mmss-noc
 31      - qcom,sa8775p-nspa-noc
 32      - qcom,sa8775p-nspb-noc
 33      - qcom,sa8775p-pcie-anoc
 34      - qcom,sa8775p-system-noc
 35
 36  reg:
 37    maxItems: 1
 38
 39  clocks:
 40    minItems: 2
 41    maxItems: 5
 42
 43required:
 44  - compatible
 45
 46allOf:
 47  - $ref: qcom,rpmh-common.yaml#
 48  - if:
 49      properties:
 50        compatible:
 51          contains:
 52            enum:
 53              - qcom,sa8775p-aggre1-noc
 54    then:
 55      properties:
 56        clocks:
 57          items:
 58            - description: aggre UFS PHY AXI clock
 59            - description: aggre QUP PRIM AXI clock
 60            - description: aggre USB2 PRIM AXI clock
 61            - description: aggre USB3 PRIM AXI clock
 62            - description: aggre USB3 SEC AXI clock
 63
 64  - if:
 65      properties:
 66        compatible:
 67          contains:
 68            enum:
 69              - qcom,sa8775p-aggre2-noc
 70    then:
 71      properties:
 72        clocks:
 73          items:
 74            - description: aggre UFS CARD AXI clock
 75            - description: RPMH CC IPA clock
 76
 77  - if:
 78      properties:
 79        compatible:
 80          contains:
 81            enum:
 82              - qcom,sa8775p-config-noc
 83              - qcom,sa8775p-dc-noc
 84              - qcom,sa8775p-gem-noc
 85              - qcom,sa8775p-gpdsp-anoc
 86              - qcom,sa8775p-lpass-ag-noc
 87              - qcom,sa8775p-mmss-noc
 88              - qcom,sa8775p-nspa-noc
 89              - qcom,sa8775p-nspb-noc
 90              - qcom,sa8775p-pcie-anoc
 91              - qcom,sa8775p-system-noc
 92    then:
 93      properties:
 94        clocks: false
 95
 96  - if:
 97      properties:
 98        compatible:
 99          contains:
100            enum:
101              - qcom,sa8775p-clk-virt
102              - qcom,sa8775p-mc-virt
103    then:
104      properties:
105        reg: false
106        clocks: false
107
108unevaluatedProperties: false
109
110examples:
111  - |
112    #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
113    clk_virt: interconnect-clk-virt {
114        compatible = "qcom,sa8775p-clk-virt";
115        #interconnect-cells = <2>;
116        qcom,bcm-voters = <&apps_bcm_voter>;
117    };
118
119    aggre1_noc: interconnect@16c0000 {
120        compatible = "qcom,sa8775p-aggre1-noc";
121        reg = <0x016c0000 0x18080>;
122        #interconnect-cells = <2>;
123        qcom,bcm-voters = <&apps_bcm_voter>;
124        clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
125                 <&gcc GCC_AGGRE_NOC_QUPV3_AXI_CLK>,
126                 <&gcc GCC_AGGRE_USB2_PRIM_AXI_CLK>,
127                 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
128                 <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>;
129    };