qcom,milos-rpmh.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/interconnect/qcom,milos-rpmh.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Qualcomm RPMh Network-On-Chip Interconnect on Milos SoC
  8
  9maintainers:
 10  - Luca Weiss <luca.weiss@fairphone.com>
 11
 12description: |
 13  RPMh interconnect providers support system bandwidth requirements through
 14  RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
 15  able to communicate with the BCM through the Resource State Coordinator (RSC)
 16  associated with each execution environment. Provider nodes must point to at
 17  least one RPMh device child node pertaining to their RSC and each provider
 18  can map to multiple RPMh resources.
 19
 20  See also: include/dt-bindings/interconnect/qcom,milos-rpmh.h
 21
 22properties:
 23  compatible:
 24    enum:
 25      - qcom,milos-aggre1-noc
 26      - qcom,milos-aggre2-noc
 27      - qcom,milos-clk-virt
 28      - qcom,milos-cnoc-cfg
 29      - qcom,milos-cnoc-main
 30      - qcom,milos-gem-noc
 31      - qcom,milos-lpass-ag-noc
 32      - qcom,milos-mc-virt
 33      - qcom,milos-mmss-noc
 34      - qcom,milos-nsp-noc
 35      - qcom,milos-pcie-anoc
 36      - qcom,milos-system-noc
 37
 38  reg:
 39    maxItems: 1
 40
 41  clocks:
 42    minItems: 1
 43    maxItems: 2
 44
 45required:
 46  - compatible
 47
 48allOf:
 49  - $ref: qcom,rpmh-common.yaml#
 50  - if:
 51      properties:
 52        compatible:
 53          contains:
 54            enum:
 55              - qcom,milos-clk-virt
 56              - qcom,milos-mc-virt
 57    then:
 58      properties:
 59        reg: false
 60    else:
 61      required:
 62        - reg
 63
 64  - if:
 65      properties:
 66        compatible:
 67          contains:
 68            enum:
 69              - qcom,milos-pcie-anoc
 70    then:
 71      properties:
 72        clocks:
 73          items:
 74            - description: aggre-NOC PCIe AXI clock
 75            - description: cfg-NOC PCIe a-NOC AHB clock
 76
 77  - if:
 78      properties:
 79        compatible:
 80          contains:
 81            enum:
 82              - qcom,milos-aggre1-noc
 83    then:
 84      properties:
 85        clocks:
 86          items:
 87            - description: aggre USB3 PRIM AXI clock
 88            - description: aggre UFS PHY AXI clock
 89
 90  - if:
 91      properties:
 92        compatible:
 93          contains:
 94            enum:
 95              - qcom,milos-aggre2-noc
 96    then:
 97      properties:
 98        clocks:
 99          items:
100            - description: RPMH CC IPA clock
101
102  - if:
103      properties:
104        compatible:
105          contains:
106            enum:
107              - qcom,milos-aggre1-noc
108              - qcom,milos-aggre2-noc
109              - qcom,milos-pcie-anoc
110    then:
111      required:
112        - clocks
113    else:
114      properties:
115        clocks: false
116
117unevaluatedProperties: false
118
119examples:
120  - |
121    #include <dt-bindings/clock/qcom,milos-gcc.h>
122
123    interconnect-0 {
124        compatible = "qcom,milos-clk-virt";
125        #interconnect-cells = <2>;
126        qcom,bcm-voters = <&apps_bcm_voter>;
127    };
128
129    interconnect@16e0000 {
130        compatible = "qcom,milos-aggre1-noc";
131        reg = <0x016e0000 0x16400>;
132        #interconnect-cells = <2>;
133        clocks = <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
134                 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>;
135        qcom,bcm-voters = <&apps_bcm_voter>;
136    };