adi,ad5592r.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/iio/dac/adi,ad5592r.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Analog Devices AD5592R/AD5593R DAC/ADC
  8
  9maintainers:
 10  - Michael Hennerich <michael.hennerich@analog.com>
 11
 12properties:
 13  compatible:
 14    enum:
 15      - adi,ad5592r
 16      - adi,ad5593r
 17
 18  reg:
 19    maxItems: 1
 20
 21  spi-max-frequency:
 22    maximum: 30000000
 23
 24  spi-cpol: true
 25
 26  "#address-cells":
 27    const: 1
 28
 29  "#size-cells":
 30    const: 0
 31
 32  "#io-channel-cells":
 33    const: 1
 34
 35  vref-supply:
 36    description: If not set internal 2.5V reference used.
 37
 38  reset-gpios:
 39    maxItems: 1
 40
 41  gpio-controller:
 42    description: Marks the device node as a GPIO controller.
 43
 44  "#gpio-cells":
 45    const: 2
 46    description:
 47      The first cell is the GPIO number and the second cell specifies
 48      GPIO flags, as defined in <dt-bindings/gpio/gpio.h>.
 49
 50required:
 51  - compatible
 52  - reg
 53  - "#address-cells"
 54  - "#size-cells"
 55
 56allOf:
 57  - if:
 58      properties:
 59        compatible:
 60          contains:
 61            const: adi,ad5592r
 62    then:
 63      required:
 64        - spi-cpol
 65    else:
 66      properties:
 67        spi-cpol: false
 68
 69additionalProperties: false
 70
 71patternProperties:
 72  "^(channel@)[0-7]$":
 73    type: object
 74    description: Child node to describe a channel
 75    properties:
 76      reg:
 77        minimum: 0
 78        maximum: 7
 79
 80      adi,mode:
 81        $ref: /schemas/types.yaml#/definitions/uint32
 82        enum: [0, 1, 2, 3, 8]
 83        description: |
 84          Mode or function of this channel.
 85          Macros specifying the valid values can be found in
 86          <dt-bindings/iio/adi,ad5592r.h>.
 87
 88          The following values are currently supported:
 89          * CH_MODE_UNUSED (the pin is unused)
 90          * CH_MODE_ADC (the pin is ADC input)
 91          * CH_MODE_DAC (the pin is DAC output)
 92          * CH_MODE_DAC_AND_ADC (the pin is DAC output but can be monitored
 93            by an ADC, since there is no disadvantage this should be
 94            considered as the preferred DAC mode)
 95          * CH_MODE_GPIO (the pin is registered with GPIOLIB)
 96
 97      adi,off-state:
 98        $ref: /schemas/types.yaml#/definitions/uint32
 99        enum: [0, 1, 2, 3]
100        description: |
101          State of this channel when unused or the device gets removed.
102          Macros specifying the  valid values can be found in
103          <dt-bindings/iio/adi,ad5592r.h>.
104          * CH_OFFSTATE_PULLDOWN (the pin is pulled down)
105          * CH_OFFSTATE_OUT_LOW  (the pin is output low)
106          * CH_OFFSTATE_OUT_HIGH (the pin is output high)
107          * CH_OFFSTATE_OUT_TRISTATE (the pin is tristated output)
108
109    required:
110      - reg
111      - adi,mode
112
113    additionalProperties: false
114
115examples:
116  - |
117    #include <dt-bindings/iio/adi,ad5592r.h>
118    spi {
119        #address-cells = <1>;
120        #size-cells = <0>;
121
122        addac@0 {
123            compatible = "adi,ad5592r";
124            #size-cells = <0>;
125            #address-cells = <1>;
126            #gpio-cells = <2>;
127            reg = <0>;
128
129            spi-max-frequency = <1000000>;
130            spi-cpol;
131
132            vref-supply = <&vref>;
133            reset-gpios = <&gpio0 86 0>;
134            gpio-controller;
135
136            channel@0 {
137                reg = <0>;
138                adi,mode = <CH_MODE_DAC>;
139            };
140            channel@1 {
141                reg = <1>;
142                adi,mode = <CH_MODE_ADC>;
143            };
144            channel@2 {
145                reg = <2>;
146                adi,mode = <CH_MODE_DAC_AND_ADC>;
147            };
148            channel@3 {
149                reg = <3>;
150                adi,mode = <CH_MODE_DAC_AND_ADC>;
151                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
152            };
153            channel@4 {
154                reg = <4>;
155                adi,mode = <CH_MODE_UNUSED>;
156                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
157            };
158            channel@5 {
159                reg = <5>;
160                adi,mode = <CH_MODE_GPIO>;
161                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
162            };
163            channel@6 {
164                reg = <6>;
165                adi,mode = <CH_MODE_GPIO>;
166                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
167            };
168            channel@7 {
169                reg = <7>;
170                adi,mode = <CH_MODE_GPIO>;
171                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
172            };
173        };
174        ad5593r@10 {
175            compatible = "adi,ad5593r";
176            #size-cells = <0>;
177            #address-cells = <1>;
178            #gpio-cells = <2>;
179            reg = <0x10>;
180            gpio-controller;
181
182            channel@0 {
183                reg = <0>;
184                adi,mode = <CH_MODE_DAC>;
185                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
186            };
187            channel@1 {
188                reg = <1>;
189                adi,mode = <CH_MODE_ADC>;
190                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
191            };
192            channel@2 {
193                reg = <2>;
194                adi,mode = <CH_MODE_DAC_AND_ADC>;
195                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
196            };
197            channel@6 {
198                reg = <6>;
199                adi,mode = <CH_MODE_GPIO>;
200                adi,off-state = <CH_OFFSTATE_PULLDOWN>;
201            };
202        };
203    };
204...