rohm,bd79112.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/iio/adc/rohm,bd79112.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: ROHM BD79112 ADC/GPO
  8
  9maintainers:
 10  - Matti Vaittinen <mazziesaccount@gmail.com>
 11
 12description: |
 13  The ROHM BD79112 is a 12-bit, 32-channel, SAR ADC. ADC input pins can be
 14  also configured as general purpose inputs/outputs. SPI should use MODE 3.
 15
 16properties:
 17  compatible:
 18    const: rohm,bd79112
 19
 20  reg:
 21    maxItems: 1
 22
 23  spi-cpha: true
 24  spi-cpol: true
 25
 26  gpio-controller: true
 27  "#gpio-cells":
 28    const: 2
 29
 30  vdd-supply: true
 31
 32  iovdd-supply: true
 33
 34  "#address-cells":
 35    const: 1
 36
 37  "#size-cells":
 38    const: 0
 39
 40patternProperties:
 41  "^channel@([0-9]|[12][0-9]|3[01])$":
 42    type: object
 43    $ref: /schemas/iio/adc/adc.yaml#
 44    description: Represents ADC channel. Omitted channels' inputs are GPIOs.
 45
 46    properties:
 47      reg:
 48        description: AIN pin number
 49        minimum: 0
 50        maximum: 31
 51
 52    required:
 53      - reg
 54
 55    additionalProperties: false
 56
 57required:
 58  - compatible
 59  - reg
 60  - iovdd-supply
 61  - vdd-supply
 62  - spi-cpha
 63  - spi-cpol
 64
 65additionalProperties: false
 66
 67examples:
 68  - |
 69    spi {
 70        #address-cells = <1>;
 71        #size-cells = <0>;
 72        adc: adc@0 {
 73            compatible = "rohm,bd79112";
 74            reg = <0x0>;
 75
 76            spi-cpha;
 77            spi-cpol;
 78
 79            vdd-supply = <&dummyreg>;
 80            iovdd-supply = <&dummyreg>;
 81
 82            #address-cells = <1>;
 83            #size-cells = <0>;
 84
 85            gpio-controller;
 86            #gpio-cells = <2>;
 87
 88            channel@0 {
 89                reg = <0>;
 90            };
 91            channel@1 {
 92                reg = <1>;
 93            };
 94            channel@2 {
 95                reg = <2>;
 96            };
 97            channel@16 {
 98                reg = <16>;
 99            };
100            channel@20 {
101                reg = <20>;
102            };
103        };
104    };