rockchip-saradc.yaml

 1# SPDX-License-Identifier: GPL-2.0
 2%YAML 1.2
 3---
 4$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
 5$schema: http://devicetree.org/meta-schemas/core.yaml#
 6
 7title: Rockchip Successive Approximation Register (SAR) A/D Converter
 8
 9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    oneOf:
15      - const: rockchip,saradc
16      - const: rockchip,rk3066-tsadc
17      - const: rockchip,rk3399-saradc
18      - const: rockchip,rk3528-saradc
19      - items:
20          - const: rockchip,rk3506-saradc
21          - const: rockchip,rk3528-saradc
22      - const: rockchip,rk3562-saradc
23      - const: rockchip,rk3588-saradc
24      - items:
25          - const: rockchip,rk3576-saradc
26          - const: rockchip,rk3588-saradc
27      - items:
28          - enum:
29              - rockchip,px30-saradc
30              - rockchip,rk3308-saradc
31              - rockchip,rk3328-saradc
32              - rockchip,rk3568-saradc
33              - rockchip,rv1108-saradc
34              - rockchip,rv1126-saradc
35          - const: rockchip,rk3399-saradc
36
37  reg:
38    maxItems: 1
39
40  interrupts:
41    maxItems: 1
42
43  clocks:
44    items:
45      - description: converter clock
46      - description: peripheral clock
47
48  clock-names:
49    items:
50      - const: saradc
51      - const: apb_pclk
52
53  power-domains:
54    maxItems: 1
55
56  resets:
57    maxItems: 1
58
59  reset-names:
60    const: saradc-apb
61
62  vref-supply:
63    description:
64      The regulator supply for the ADC reference voltage.
65
66  "#io-channel-cells":
67    const: 1
68
69required:
70  - compatible
71  - reg
72  - interrupts
73  - clocks
74  - clock-names
75  - vref-supply
76  - "#io-channel-cells"
77
78additionalProperties: false
79
80examples:
81  - |
82    #include <dt-bindings/clock/rk3288-cru.h>
83    #include <dt-bindings/interrupt-controller/arm-gic.h>
84    saradc: saradc@2006c000 {
85      compatible = "rockchip,saradc";
86      reg = <0x2006c000 0x100>;
87      interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
88      clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
89      clock-names = "saradc", "apb_pclk";
90      resets = <&cru SRST_SARADC>;
91      reset-names = "saradc-apb";
92      vref-supply = <&vcc18>;
93      #io-channel-cells = <1>;
94    };