renesas,rcar-gyroadc.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Renesas R-Car GyroADC
  8
  9maintainers:
 10  - Marek Vasut <marek.vasut+renesas@gmail.com>
 11
 12description: |
 13  The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
 14  which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
 15  are sampled by the GyroADC block in a round-robin fashion and the result
 16  presented in the GyroADC registers.
 17  The ADC bindings should match with that of the devices connected to a
 18  full featured SPI bus.
 19
 20properties:
 21  compatible:
 22    items:
 23      - enum:
 24          - renesas,r8a7791-gyroadc
 25          - renesas,r8a7792-gyroadc
 26      - const: renesas,rcar-gyroadc
 27
 28  reg:
 29    maxItems: 1
 30
 31  clocks:
 32    maxItems: 1
 33
 34  clock-names:
 35    const: fck
 36
 37  power-domains:
 38    maxItems: 1
 39
 40  resets:
 41    maxItems: 1
 42
 43  "#address-cells":
 44    const: 1
 45
 46  "#size-cells":
 47    const: 0
 48
 49additionalProperties: false
 50
 51required:
 52  - compatible
 53  - reg
 54  - clocks
 55  - clock-names
 56  - power-domains
 57  - resets
 58  - "#address-cells"
 59  - "#size-cells"
 60
 61patternProperties:
 62  "@[0-7]$":
 63    type: object
 64    properties:
 65      compatible:
 66        description: |
 67          fujitsu,mb88101a
 68          - Fujitsu MB88101A compatible mode,
 69            12bit sampling, up to 4 channels can be sampled in round-robin
 70            fashion. One Fujitsu chip supplies four GyroADC channels with
 71            data as it contains four ADCs on the chip and thus for 4-channel
 72            operation, single MB88101A is required. The Cx chipselect lines
 73            of the MB88101A connect directly to two CHS lines of the GyroADC,
 74            no demuxer is required. The data out line of each MB88101A
 75            connects to a shared input pin of the GyroADC.
 76          ti,adcs7476 or ti,adc121 or adi,ad7476
 77          - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, 15bit
 78            sampling, up to 8 channels can be sampled in round-robin
 79            fashion. One TI/ADI chip supplies single ADC channel with data,
 80            thus for 8-channel operation, 8 chips are required.
 81            A 3:8 chipselect demuxer is  required to connect the nCS line
 82            of the TI/ADI chips to the GyroADC, while MISO line of each
 83            TI/ADI ADC connects to a shared input pin of the GyroADC.
 84          maxim,max1162 or maxim,max11100
 85          - Maxim MAX1162 / Maxim MAX11100 compatible mode,  16bit sampling,
 86            up to 8 channels can be sampled in round-robin fashion. One
 87            Maxim chip supplies single ADC channel with data, thus for
 88            8-channel operation, 8 chips are required.
 89            A 3:8 chipselect demuxer is required to connect the nCS line
 90            of the MAX chips to the GyroADC, while MISO line of each Maxim
 91            ADC connects to a shared input pin of the GyroADC.
 92        enum:
 93          - adi,ad7476
 94          - fujitsu,mb88101a
 95          - maxim,max1162
 96          - maxim,max11100
 97          - ti,adcs7476
 98          - ti,adc121
 99
100      reg:
101        minimum: 0
102        maximum: 7
103
104      vref-supply: true
105
106    additionalProperties: false
107
108    required:
109      - compatible
110      - reg
111      - vref-supply
112
113examples:
114  - |
115    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
116    #include <dt-bindings/power/r8a7791-sysc.h>
117
118    adc@e6e54000 {
119        compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
120        reg = <0xe6e54000 64>;
121        clocks = <&cpg CPG_MOD 901>;
122        clock-names = "fck";
123        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
124        resets = <&cpg 901>;
125
126        #address-cells = <1>;
127        #size-cells = <0>;
128
129        adc@0 {
130            reg = <0>;
131            compatible = "maxim,max1162";
132            vref-supply = <&vref_max1162>;
133        };
134
135        adc@1 {
136            reg = <1>;
137            compatible = "maxim,max1162";
138            vref-supply = <&vref_max1162>;
139        };
140    };
141...