adi,ade9000.yaml

 1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
 2# Copyright 2025 Analog Devices Inc.
 3%YAML 1.2
 4---
 5$id: http://devicetree.org/schemas/iio/adc/adi,ade9000.yaml#
 6$schema: http://devicetree.org/meta-schemas/core.yaml#
 7
 8title: Analog Devices ADE9000 High Performance, Polyphase Energy Metering
 9
10maintainers:
11  - Antoniu Miclaus <antoniu.miclaus@analog.com>
12
13description: |
14  The ADE9000 is a highly accurate, fully integrated, multiphase energy and power
15  quality monitoring device. Superior analog performance and a digital signal
16  processing (DSP) core enable accurate energy monitoring over a wide dynamic
17  range. An integrated high end reference ensures low drift over temperature
18  with a combined drift of less than ±25 ppm/°C maximum for the entire channel
19  including a programmable gain amplifier (PGA) and an analog-to-digital
20  converter (ADC).
21
22  https://www.analog.com/media/en/technical-documentation/data-sheets/ADE9000.pdf
23
24$ref: /schemas/spi/spi-peripheral-props.yaml#
25
26properties:
27  compatible:
28    enum:
29      - adi,ade9000
30
31  reg:
32    maxItems: 1
33
34  spi-max-frequency:
35    maximum: 20000000
36
37  interrupts:
38    maxItems: 3
39
40  interrupt-names:
41    items:
42      enum: [irq0, irq1, dready]
43    minItems: 1
44    maxItems: 3
45
46  reset-gpios:
47    description:
48      Must be the device tree identifier of the RESET pin. As the line is
49      active low, it should be marked GPIO_ACTIVE_LOW.
50    maxItems: 1
51
52  vdd-supply: true
53
54  vref-supply: true
55
56  clocks:
57    description: External clock source when not using crystal
58    maxItems: 1
59
60  "#clock-cells":
61    description:
62      ADE9000 can provide clock output via CLKOUT pin with external buffer.
63    const: 0
64
65required:
66  - compatible
67  - reg
68  - vdd-supply
69
70unevaluatedProperties: false
71
72examples:
73  - |
74    #include <dt-bindings/gpio/gpio.h>
75    #include <dt-bindings/interrupt-controller/irq.h>
76
77    spi {
78      #address-cells = <1>;
79      #size-cells = <0>;
80
81      adc@0 {
82          compatible = "adi,ade9000";
83          reg = <0>;
84          spi-max-frequency = <7000000>;
85
86          #clock-cells = <0>;
87          reset-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
88          interrupts = <2 IRQ_TYPE_EDGE_FALLING>, <3 IRQ_TYPE_EDGE_FALLING>, <4 IRQ_TYPE_EDGE_FALLING>;
89          interrupt-names = "irq0", "irq1", "dready";
90          interrupt-parent = <&gpio>;
91          clocks = <&ext_clock_24576khz>;
92          vdd-supply = <&vdd_reg>;
93      };
94    };