adi,ad7944.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/iio/adc/adi,ad7944.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Analog Devices PulSAR LFCSP Analog to Digital Converters
  8
  9maintainers:
 10  - Michael Hennerich <Michael.Hennerich@analog.com>
 11  - Nuno Sá <nuno.sa@analog.com>
 12
 13description: |
 14  A family of pin-compatible single channel differential analog to digital
 15  converters with SPI support in a LFCSP package.
 16
 17  * https://www.analog.com/en/products/ad7944.html
 18  * https://www.analog.com/en/products/ad7985.html
 19  * https://www.analog.com/en/products/ad7986.html
 20
 21$ref: /schemas/spi/spi-peripheral-props.yaml#
 22
 23properties:
 24  compatible:
 25    enum:
 26      - adi,ad7944
 27      - adi,ad7985
 28      - adi,ad7986
 29
 30  reg:
 31    maxItems: 1
 32
 33  spi-max-frequency:
 34    maximum: 111111111
 35
 36  spi-cpol: true
 37  spi-cpha: true
 38
 39  adi,spi-mode:
 40    $ref: /schemas/types.yaml#/definitions/string
 41    enum: [ single, chain ]
 42    description: |
 43      This property indicates the SPI wiring configuration.
 44
 45      When this property is omitted, it is assumed that the device is using what
 46      the datasheet calls "4-wire mode". This is the conventional SPI mode used
 47      when there are multiple devices on the same bus. In this mode, the CNV
 48      line is used to initiate the conversion and the SDI line is connected to
 49      CS on the SPI controller.
 50
 51      When this property is present, it indicates that the device is using one
 52      of the following alternative wiring configurations:
 53
 54      * single: The datasheet calls this "3-wire mode". (NOTE: The datasheet's
 55        definition of 3-wire mode is NOT at all related to the standard
 56        spi-3wire property!) This mode is often used when the ADC is the only
 57        device on the bus. In this mode, SDI is tied to VIO, and the CNV line
 58        can be connected to the CS line of the SPI controller or to a GPIO, in
 59        which case the CS line of the controller is unused.
 60      * chain: The datasheet calls this "chain mode". This mode is used to save
 61        on wiring when multiple ADCs are used. In this mode, the SDI line of
 62        one chip is tied to the SDO of the next chip in the chain and the SDI of
 63        the last chip in the chain is tied to GND. Only the first chip in the
 64        chain is connected to the SPI bus. The CNV line of all chips are tied
 65        together. The CS line of the SPI controller can be used as the CNV line
 66        only if it is active high.
 67
 68  '#daisy-chained-devices': true
 69
 70  avdd-supply:
 71    description: A 2.5V supply that powers the analog circuitry.
 72
 73  dvdd-supply:
 74    description: A 2.5V supply that powers the digital circuitry.
 75
 76  vio-supply:
 77    description:
 78      A 1.8V to 2.7V supply for the digital inputs and outputs.
 79
 80  bvdd-supply:
 81    description:
 82      A voltage supply for the buffered power. When using an external reference
 83      without an internal buffer (PDREF high, REFIN low), this should be
 84      connected to the same supply as ref-supply. Otherwise, when using an
 85      internal reference or an external reference with an internal buffer, this
 86      is connected to a 5V supply.
 87
 88  ref-supply:
 89    description:
 90      Voltage regulator for the external reference voltage (REF). This property
 91      is omitted when using an internal reference.
 92
 93  refin-supply:
 94    description:
 95      Voltage regulator for the reference buffer input (REFIN). When using an
 96      external buffer with internal reference, this should be connected to a
 97      1.2V external reference voltage supply. Otherwise, this property is
 98      omitted.
 99
100  cnv-gpios:
101    description:
102      The Convert Input (CNV). This input has multiple functions. It initiates
103      the conversions and selects the SPI mode of the device (chain or CS). In
104      'single' mode, this property is omitted if the CNV pin is connected to the
105      CS line of the SPI controller.
106    maxItems: 1
107
108  turbo-gpios:
109    description:
110      GPIO connected to the TURBO line. If omitted, it is assumed that the TURBO
111      line is hard-wired and the state is determined by the adi,always-turbo
112      property.
113    maxItems: 1
114
115  adi,always-turbo:
116    type: boolean
117    description:
118      When present, this property indicates that the TURBO line is hard-wired
119      and the state is always high. If neither this property nor turbo-gpios is
120      present, the TURBO line is assumed to be hard-wired and the state is
121      always low.
122
123  interrupts:
124    description:
125      The SDO pin can also function as a busy indicator. This node should be
126      connected to an interrupt that is triggered when the SDO line goes low
127      while the SDI line is high and the CNV line is low ('single' mode) or the
128      SDI line is low and the CNV line is high ('multi' mode); or when the SDO
129      line goes high while the SDI and CNV lines are high (chain mode),
130    maxItems: 1
131
132required:
133  - compatible
134  - reg
135  - avdd-supply
136  - dvdd-supply
137  - vio-supply
138  - bvdd-supply
139
140allOf:
141  # ref-supply and refin-supply are mutually exclusive (neither is also valid)
142  - if:
143      required:
144        - ref-supply
145    then:
146      properties:
147        refin-supply: false
148  - if:
149      required:
150        - refin-supply
151    then:
152      properties:
153        ref-supply: false
154  # in '4-wire' mode, cnv-gpios is required, for other modes it is optional
155  - if:
156      not:
157        required:
158          - adi,spi-mode
159    then:
160      required:
161        - cnv-gpios
162  # chain mode has lower SCLK max rate and doesn't work when TURBO is enabled
163  - if:
164      required:
165        - adi,spi-mode
166      properties:
167        adi,spi-mode:
168          const: chain
169    then:
170      properties:
171        spi-max-frequency:
172          maximum: 90909090
173        adi,always-turbo: false
174      required:
175        - '#daisy-chained-devices'
176    else:
177      properties:
178        '#daisy-chained-devices': false
179  # turbo-gpios and adi,always-turbo are mutually exclusive
180  - if:
181      required:
182        - turbo-gpios
183    then:
184      properties:
185        adi,always-turbo: false
186  - if:
187      required:
188        - adi,always-turbo
189    then:
190      properties:
191        turbo-gpios: false
192
193unevaluatedProperties: false
194
195examples:
196  - |
197    #include <dt-bindings/gpio/gpio.h>
198    spi {
199        #address-cells = <1>;
200        #size-cells = <0>;
201        adc@0 {
202            compatible = "adi,ad7944";
203            reg = <0>;
204            spi-cpha;
205            spi-max-frequency = <111111111>;
206            avdd-supply = <&supply_2_5V>;
207            dvdd-supply = <&supply_2_5V>;
208            vio-supply = <&supply_1_8V>;
209            bvdd-supply = <&supply_5V>;
210            cnv-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
211            turbo-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
212        };
213    };