adi,ad7124.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2# Copyright 2019 Analog Devices Inc.
  3%YAML 1.2
  4---
  5$id: http://devicetree.org/schemas/iio/adc/adi,ad7124.yaml#
  6$schema: http://devicetree.org/meta-schemas/core.yaml#
  7
  8title: Analog Devices AD7124 ADC device driver
  9
 10maintainers:
 11  - Marcelo Schmitt <marcelo.schmitt@analog.com>
 12  - Nuno Sá <nuno.sa@analog.com>
 13
 14description: |
 15  Bindings for the Analog Devices AD7124 ADC device. Datasheet can be
 16  found here:
 17    https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
 18
 19properties:
 20  compatible:
 21    enum:
 22      - adi,ad7124-4
 23      - adi,ad7124-8
 24
 25  reg:
 26    description: SPI chip select number for the device
 27    maxItems: 1
 28
 29  clocks:
 30    maxItems: 1
 31    description: Optional external clock connected to the CLK pin.
 32
 33  clock-names:
 34    deprecated: true
 35    description:
 36      MCLK is an internal counter in the ADC. Do not use this property.
 37    items:
 38      - const: mclk
 39
 40  '#clock-cells':
 41    description:
 42      The CLK pin can be used as an output. When that is the case, include
 43      this property.
 44    const: 0
 45
 46  interrupts:
 47    description: IRQ line for the ADC
 48    maxItems: 1
 49
 50  rdy-gpios:
 51    description:
 52      GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but
 53      highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its
 54      DOUT aka MISO role) and so usually triggers a spurious interrupt. The
 55      distinction between such a spurious event and a real one can only be done
 56      by reading such a GPIO. (There is a register telling the same
 57      information, but accessing that one needs a SPI transfer which then
 58      triggers another interrupt event.)
 59    maxItems: 1
 60
 61  '#address-cells':
 62    const: 1
 63
 64  '#size-cells':
 65    const: 0
 66
 67  refin1-supply:
 68    description: refin1 supply can be used as reference for conversion.
 69
 70  refin2-supply:
 71    description: refin2 supply can be used as reference for conversion.
 72
 73  avdd-supply:
 74    description: avdd supply can be used as reference for conversion.
 75
 76required:
 77  - compatible
 78  - reg
 79  - interrupts
 80
 81# Can't have both clock input and output at the same time.
 82not:
 83  required:
 84    - '#clock-cells'
 85    - clocks
 86
 87patternProperties:
 88  "^channel@([0-9]|1[0-5])$":
 89    $ref: adc.yaml
 90    type: object
 91    description: |
 92      Represents the external channels which are connected to the ADC.
 93
 94    properties:
 95      reg:
 96        description: |
 97          The channel number. It can have up to 8 channels on ad7124-4
 98          and 16 channels on ad7124-8, numbered from 0 to 15.
 99        items:
100          minimum: 0
101          maximum: 15
102
103      adi,reference-select:
104        description: |
105          Select the reference source to use when converting on
106          the specific channel. Valid values are:
107          0: REFIN1(+)/REFIN1(−).
108          1: REFIN2(+)/REFIN2(−).
109          3: AVDD
110          If this field is left empty, internal reference is selected.
111        $ref: /schemas/types.yaml#/definitions/uint32
112        enum: [0, 1, 3]
113
114      diff-channels: true
115
116      bipolar: true
117
118      adi,buffered-positive:
119        description: Enable buffered mode for positive input.
120        type: boolean
121
122      adi,buffered-negative:
123        description: Enable buffered mode for negative input.
124        type: boolean
125
126    required:
127      - reg
128      - diff-channels
129
130    additionalProperties: false
131
132allOf:
133  - $ref: /schemas/spi/spi-peripheral-props.yaml#
134
135unevaluatedProperties: false
136
137examples:
138  - |
139    #include <dt-bindings/gpio/gpio.h>
140    spi {
141      #address-cells = <1>;
142      #size-cells = <0>;
143
144      adc@0 {
145        compatible = "adi,ad7124-4";
146        reg = <0>;
147        spi-max-frequency = <5000000>;
148        interrupts = <25 2>;
149        interrupt-parent = <&gpio>;
150        rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
151        refin1-supply = <&adc_vref>;
152
153        #address-cells = <1>;
154        #size-cells = <0>;
155
156        channel@0 {
157          reg = <0>;
158          diff-channels = <0 1>;
159          adi,reference-select = <0>;
160          adi,buffered-positive;
161        };
162
163        channel@1 {
164          reg = <1>;
165          bipolar;
166          diff-channels = <2 3>;
167          adi,reference-select = <0>;
168          adi,buffered-positive;
169          adi,buffered-negative;
170        };
171
172        channel@2 {
173          reg = <2>;
174          diff-channels = <4 5>;
175        };
176
177        channel@3 {
178          reg = <3>;
179          diff-channels = <6 7>;
180        };
181      };
182    };