samsung,s3c2410-i2c.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Samsung S3C/S5P/Exynos SoC I2C Controller
  8
  9maintainers:
 10  - Krzysztof Kozlowski <krzk@kernel.org>
 11
 12properties:
 13  compatible:
 14    oneOf:
 15      - enum:
 16          - samsung,s3c2440-i2c
 17            # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
 18          - samsung,s3c2440-hdmiphy-i2c
 19            # For s3c2440-like I2C used as a host to SATA PHY controller on an
 20            # internal bus:
 21          - samsung,exynos5-sata-phy-i2c
 22      - items:
 23          - enum:
 24              - samsung,exynos7870-i2c
 25              - samsung,exynos7885-i2c
 26              - samsung,exynos850-i2c
 27          - const: samsung,s3c2440-i2c
 28
 29  clocks:
 30    maxItems: 1
 31
 32  clock-names:
 33    items:
 34      - const: i2c
 35
 36  gpios:
 37    description: |
 38      The order of the GPIOs should be the following:: <SDA, SCL>.  The GPIO
 39      specifier depends on the gpio controller. Required in all cases except
 40      for "samsung,s3c2440-hdmiphy-i2c" whose input/output lines are
 41      permanently wired to the respective client.
 42      This property is deprecated. Use "pinctrl-0" and "pinctrl-names" instead.
 43    deprecated: true
 44
 45  interrupts:
 46    maxItems: 1
 47
 48  reg:
 49    maxItems: 1
 50
 51  samsung,i2c-max-bus-freq:
 52    $ref: /schemas/types.yaml#/definitions/uint32
 53    description:
 54      Desired frequency in Hz of the bus.
 55    default: 100000
 56
 57  samsung,i2c-sda-delay:
 58    $ref: /schemas/types.yaml#/definitions/uint32
 59    description:
 60      Delay (in ns) applied to data line (SDA) edges.
 61    default: 0
 62
 63  samsung,i2c-slave-addr:
 64    $ref: /schemas/types.yaml#/definitions/uint32
 65    description:
 66      Slave address in multi-master environment.
 67    default: 0
 68
 69  samsung,sysreg-phandle:
 70    $ref: /schemas/types.yaml#/definitions/phandle
 71    description: Pandle to syscon used to control the system registers.
 72
 73required:
 74  - compatible
 75  - reg
 76
 77allOf:
 78  - $ref: /schemas/i2c/i2c-controller.yaml#
 79  - if:
 80      properties:
 81        compatible:
 82          contains:
 83            enum:
 84              - samsung,s3c2440-hdmiphy-i2c
 85              - samsung,exynos5-sata-phy-i2c
 86    then:
 87      properties:
 88        gpios: false
 89
 90  - if:
 91      properties:
 92        compatible:
 93          contains:
 94            enum:
 95              - samsung,s3c2440-i2c
 96              - samsung,s3c2440-hdmiphy-i2c
 97    then:
 98      required:
 99        - interrupts
100
101unevaluatedProperties: false
102
103examples:
104  - |
105    #include <dt-bindings/clock/exynos5250.h>
106    #include <dt-bindings/interrupt-controller/arm-gic.h>
107
108    i2c@12c60000 {
109        compatible = "samsung,s3c2440-i2c";
110        reg = <0x12C60000 0x100>;
111        interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
112        #address-cells = <1>;
113        #size-cells = <0>;
114        clocks = <&clock CLK_I2C0>;
115        clock-names = "i2c";
116        pinctrl-names = "default";
117        pinctrl-0 = <&i2c0_bus>;
118
119        samsung,sysreg-phandle = <&sysreg_system_controller>;
120        samsung,i2c-sda-delay = <100>;
121        samsung,i2c-max-bus-freq = <20000>;
122        samsung,i2c-slave-addr = <0x66>;
123
124        eeprom@50 {
125            compatible = "samsung,s524ad0xd1", "atmel,24c128";
126            reg = <0x50>;
127        };
128    };
129
130    i2c@12ce0000 {
131        compatible = "samsung,s3c2440-hdmiphy-i2c";
132        reg = <0x12CE0000 0x1000>;
133        interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
134        #address-cells = <1>;
135        #size-cells = <0>;
136        clocks = <&clock CLK_I2C_HDMI>;
137        clock-names = "i2c";
138
139        samsung,i2c-sda-delay = <100>;
140        samsung,i2c-max-bus-freq = <66000>;
141
142        phy-i2c@38 {
143            compatible = "samsung,exynos4212-hdmiphy";
144            reg = <0x38>;
145        };
146    };
147
148    i2c@121d0000 {
149        compatible = "samsung,exynos5-sata-phy-i2c";
150        reg = <0x121D0000 0x100>;
151        #address-cells = <1>;
152        #size-cells = <0>;
153        clocks = <&clock CLK_SATA_PHYI2C>;
154        clock-names = "i2c";
155
156        samsung,i2c-sda-delay = <100>;
157        samsung,i2c-max-bus-freq = <40000>;
158
159        phy-i2c@38 {
160            compatible = "samsung,exynos-sataphy-i2c";
161            reg = <0x38>;
162        };
163    };