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qcom,i2c-qup.yaml

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linux-6.19.14/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml YAML
  1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Qualcomm Universal Peripheral (QUP) I2C controller
  8
  9maintainers:
 10  - Andy Gross <agross@kernel.org>
 11  - Bjorn Andersson <bjorn.andersson@linaro.org>
 12  - Krzysztof Kozlowski <krzk@kernel.org>
 13
 14allOf:
 15  - $ref: /schemas/i2c/i2c-controller.yaml#
 16
 17properties:
 18  compatible:
 19    enum:
 20      - qcom,i2c-qup-v1.1.1     # for 8660, 8960 and 8064
 21      - qcom,i2c-qup-v2.1.1     # for 8974 v1
 22      - qcom,i2c-qup-v2.2.1     # for 8974 v2 and later
 23
 24  clocks:
 25    maxItems: 2
 26
 27  clock-names:
 28    items:
 29      - const: core
 30      - const: iface
 31
 32  clock-frequency:
 33    default: 100000
 34
 35  dmas:
 36    maxItems: 2
 37
 38  dma-names:
 39    items:
 40      - const: tx
 41      - const: rx
 42
 43  interconnects:
 44    maxItems: 1
 45
 46  interrupts:
 47    maxItems: 1
 48
 49  pinctrl-0: true
 50  pinctrl-1: true
 51
 52  pinctrl-names:
 53    minItems: 1
 54    items:
 55      - const: default
 56      - const: sleep
 57
 58  power-domains:
 59    maxItems: 1
 60
 61  reg:
 62    maxItems: 1
 63
 64  required-opps:
 65    maxItems: 1
 66
 67required:
 68  - compatible
 69  - clock-names
 70  - clocks
 71  - interrupts
 72  - reg
 73
 74unevaluatedProperties: false
 75
 76examples:
 77  - |
 78    #include <dt-bindings/clock/qcom,gcc-msm8998.h>
 79    #include <dt-bindings/interconnect/qcom,msm8996.h>
 80    #include <dt-bindings/interrupt-controller/arm-gic.h>
 81    #include <dt-bindings/power/qcom-rpmpd.h>
 82
 83    i2c@c175000 {
 84        compatible = "qcom,i2c-qup-v2.2.1";
 85        reg = <0x0c175000 0x600>;
 86        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
 87
 88        clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
 89                 <&gcc GCC_BLSP1_AHB_CLK>;
 90        clock-names = "core", "iface";
 91        dmas = <&blsp1_dma 6>, <&blsp1_dma 7>;
 92        dma-names = "tx", "rx";
 93        pinctrl-names = "default", "sleep";
 94        pinctrl-0 = <&blsp1_i2c1_default>;
 95        pinctrl-1 = <&blsp1_i2c1_sleep>;
 96        power-domains = <&rpmpd MSM8909_VDDCX>;
 97        required-opps = <&rpmpd_opp_svs_krait>;
 98        interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>;
 99        clock-frequency = <400000>;
100
101        #address-cells = <1>;
102        #size-cells = <0>;
103    };
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