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opencores,i2c-ocores.yaml

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linux-6.19.14/Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml YAML
  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: OpenCores I2C controller
  8
  9maintainers:
 10  - Peter Korsgaard <peter@korsgaard.com>
 11  - Andrew Lunn <andrew@lunn.ch>
 12
 13allOf:
 14  - $ref: /schemas/i2c/i2c-controller.yaml#
 15
 16properties:
 17  compatible:
 18    oneOf:
 19      - items:
 20          - enum:
 21              - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC
 22              - sifive,fu540-c000-i2c # Opencore based IP block FU540-C000 SoC
 23          - const: sifive,i2c0
 24      - enum:
 25          - opencores,i2c-ocores
 26          - aeroflexgaisler,i2cmst
 27
 28  reg:
 29    maxItems: 1
 30
 31  interrupts:
 32    maxItems: 1
 33
 34  clocks:
 35    maxItems: 1
 36
 37  clock-frequency:
 38    description: |
 39      clock-frequency property is meant to control the bus frequency for i2c bus
 40      drivers, but it was incorrectly used to specify i2c controller input clock
 41      frequency. So the following rules are set to fix this situation:
 42      - if clock-frequency is present and neither opencores,ip-clock-frequency nor
 43        clocks are, then clock-frequency specifies i2c controller clock frequency.
 44        This is to keep backwards compatibility with setups using old DTB. i2c bus
 45        frequency is fixed at 100 KHz.
 46      - if clocks is present it specifies i2c controller clock. clock-frequency
 47        property specifies i2c bus frequency.
 48      - if opencores,ip-clock-frequency is present it specifies i2c controller
 49        clock frequency. clock-frequency property specifies i2c bus frequency.
 50    default: 100000
 51
 52  reg-io-width:
 53    description: |
 54      io register width in bytes
 55    enum: [1, 2, 4]
 56
 57  reg-shift:
 58    description: |
 59      device register offsets are shifted by this value
 60    default: 0
 61
 62  regstep:
 63    $ref: /schemas/types.yaml#/definitions/uint32
 64    description: |
 65      deprecated, use reg-shift above
 66    deprecated: true
 67
 68  opencores,ip-clock-frequency:
 69    $ref: /schemas/types.yaml#/definitions/uint32
 70    description: |
 71      Frequency of the controller clock in Hz. Mutually exclusive with clocks.
 72      See the note above.
 73
 74required:
 75  - compatible
 76  - reg
 77  - "#address-cells"
 78  - "#size-cells"
 79
 80oneOf:
 81  - required:
 82      - opencores,ip-clock-frequency
 83  - required:
 84      - clocks
 85
 86unevaluatedProperties: false
 87
 88examples:
 89  - |
 90    i2c@a0000000 {
 91      compatible = "opencores,i2c-ocores";
 92      reg = <0xa0000000 0x8>;
 93      #address-cells = <1>;
 94      #size-cells = <0>;
 95      interrupts = <10>;
 96      opencores,ip-clock-frequency = <20000000>;
 97
 98      reg-shift = <0>;	/* 8 bit registers */
 99      reg-io-width = <1>;	/* 8 bit read/write */
100    };
101
102    i2c@b0000000 {
103      compatible = "opencores,i2c-ocores";
104      reg = <0xa0000000 0x8>;
105      #address-cells = <1>;
106      #size-cells = <0>;
107      interrupts = <10>;
108      clocks = <&osc>;
109      clock-frequency = <400000>; /* i2c bus frequency 400 KHz */
110
111      reg-shift = <0>;	/* 8 bit registers */
112      reg-io-width = <1>;	/* 8 bit read/write */
113    };
114...
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