i2c-mt65xx.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: MediaTek I2C controller
  8
  9description:
 10  This driver interfaces with the native I2C controller present in
 11  various MediaTek SoCs.
 12
 13allOf:
 14  - $ref: /schemas/i2c/i2c-controller.yaml#
 15
 16maintainers:
 17  - Qii Wang <qii.wang@mediatek.com>
 18
 19properties:
 20  compatible:
 21    oneOf:
 22      - const: mediatek,mt2712-i2c
 23      - const: mediatek,mt6577-i2c
 24      - const: mediatek,mt6589-i2c
 25      - const: mediatek,mt7622-i2c
 26      - const: mediatek,mt7981-i2c
 27      - const: mediatek,mt7986-i2c
 28      - const: mediatek,mt8168-i2c
 29      - const: mediatek,mt8173-i2c
 30      - const: mediatek,mt8183-i2c
 31      - const: mediatek,mt8186-i2c
 32      - const: mediatek,mt8188-i2c
 33      - const: mediatek,mt8192-i2c
 34      - items:
 35          - enum:
 36              - mediatek,mt7629-i2c
 37              - mediatek,mt8516-i2c
 38          - const: mediatek,mt2712-i2c
 39      - items:
 40          - enum:
 41              - mediatek,mt2701-i2c
 42              - mediatek,mt6797-i2c
 43              - mediatek,mt7623-i2c
 44          - const: mediatek,mt6577-i2c
 45      - items:
 46          - enum:
 47              - mediatek,mt8365-i2c
 48          - const: mediatek,mt8168-i2c
 49      - items:
 50          - enum:
 51              - mediatek,mt6795-i2c
 52          - const: mediatek,mt8173-i2c
 53      - items:
 54          - enum:
 55              - mediatek,mt6878-i2c
 56              - mediatek,mt6991-i2c
 57              - mediatek,mt8196-i2c
 58          - const: mediatek,mt8188-i2c
 59      - items:
 60          - enum:
 61              - mediatek,mt6893-i2c
 62              - mediatek,mt8195-i2c
 63          - const: mediatek,mt8192-i2c
 64
 65  reg:
 66    items:
 67      - description: Physical base address
 68      - description: DMA base address
 69
 70  interrupts:
 71    maxItems: 1
 72
 73  clocks:
 74    minItems: 2
 75    items:
 76      - description: Main clock for I2C bus
 77      - description: Clock for I2C via DMA
 78      - description: Bus arbitrator clock
 79      - description: Clock for I2C from PMIC
 80
 81  clock-names:
 82    minItems: 2
 83    items:
 84      - const: main
 85      - const: dma
 86      - const: arb
 87      - const: pmic
 88
 89  clock-div:
 90    $ref: /schemas/types.yaml#/definitions/uint32
 91    description: Frequency divider of clock source in I2C module
 92
 93  clock-frequency:
 94    default: 100000
 95    description:
 96      SCL frequency to use (in Hz). If omitted, 100kHz is used.
 97
 98  mediatek,have-pmic:
 99    description: Platform controls I2C from PMIC side
100    type: boolean
101
102  mediatek,use-push-pull:
103    description: Use push-pull mode I/O config
104    type: boolean
105
106  vbus-supply:
107    description: Phandle to the regulator providing power to SCL/SDA
108
109required:
110  - compatible
111  - reg
112  - clocks
113  - clock-names
114  - clock-div
115  - interrupts
116
117unevaluatedProperties: false
118
119examples:
120  - |
121    #include <dt-bindings/interrupt-controller/arm-gic.h>
122    #include <dt-bindings/interrupt-controller/irq.h>
123
124    i2c0: i2c@1100d000 {
125      compatible = "mediatek,mt6577-i2c";
126      reg = <0x1100d000 0x70>, <0x11000300 0x80>;
127      interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
128      clocks = <&i2c0_ck>, <&ap_dma_ck>;
129      clock-names = "main", "dma";
130      clock-div = <16>;
131      clock-frequency = <400000>;
132      mediatek,have-pmic;
133
134      #address-cells = <1>;
135      #size-cells = <0>;
136    };