i2c-mpc.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs
  8
  9maintainers:
 10  - Chris Packham <chris.packham@alliedtelesis.co.nz>
 11
 12allOf:
 13  - $ref: /schemas/i2c/i2c-controller.yaml#
 14
 15properties:
 16  compatible:
 17    oneOf:
 18      - items:
 19          - enum:
 20              - mpc5200-i2c
 21              - fsl,mpc5200-i2c
 22              - fsl,mpc5121-i2c
 23              - fsl,mpc8313-i2c
 24              - fsl,mpc8543-i2c
 25              - fsl,mpc8544-i2c
 26          - const: fsl-i2c
 27      - items:
 28          - const: fsl,mpc5200b-i2c
 29          - const: fsl,mpc5200-i2c
 30          - const: fsl-i2c
 31
 32  reg:
 33    maxItems: 1
 34
 35  interrupts:
 36    maxItems: 1
 37
 38  fsl,preserve-clocking:
 39    $ref: /schemas/types.yaml#/definitions/flag
 40    description: |
 41      if defined, the clock settings from the bootloader are
 42      preserved (not touched)
 43
 44  fsl,timeout:
 45    $ref: /schemas/types.yaml#/definitions/uint32
 46    deprecated: true
 47    description: |
 48      I2C bus timeout in microseconds
 49
 50  fsl,i2c-erratum-a004447:
 51    $ref: /schemas/types.yaml#/definitions/flag
 52    description: |
 53      Indicates the presence of QorIQ erratum A-004447, which
 54      says that the standard i2c recovery scheme mechanism does
 55      not work and an alternate implementation is needed.
 56
 57required:
 58  - compatible
 59  - reg
 60  - interrupts
 61
 62unevaluatedProperties: false
 63
 64examples:
 65  - |
 66    /* MPC5121 based board */
 67    i2c@1740 {
 68        #address-cells = <1>;
 69        #size-cells = <0>;
 70        compatible = "fsl,mpc5121-i2c", "fsl-i2c";
 71        reg = <0x1740 0x20>;
 72        interrupts = <11 0x8>;
 73        interrupt-parent = <&ipic>;
 74        clock-frequency = <100000>;
 75    };
 76
 77  - |
 78    /* MPC5200B based board */
 79    i2c@3d00 {
 80        #address-cells = <1>;
 81        #size-cells = <0>;
 82        compatible = "fsl,mpc5200b-i2c", "fsl,mpc5200-i2c", "fsl-i2c";
 83        reg = <0x3d00 0x40>;
 84        interrupts = <2 15 0>;
 85        interrupt-parent = <&mpc5200_pic>;
 86        fsl,preserve-clocking;
 87    };
 88
 89  - |
 90    /* MPC8544 base board */
 91    i2c@3100 {
 92        #address-cells = <1>;
 93        #size-cells = <0>;
 94        compatible = "fsl,mpc8544-i2c", "fsl-i2c";
 95        reg = <0x3100 0x100>;
 96        interrupts = <43 2>;
 97        interrupt-parent = <&mpic>;
 98        clock-frequency = <400000>;
 99        i2c-transfer-timeout-us = <10000>;
100    };
101...