snps,dw-apb-gpio.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Synopsys DesignWare APB GPIO controller
  8
  9description: |
 10  Synopsys DesignWare GPIO controllers have a configurable number of ports,
 11  each of which are intended to be represented as child nodes with the generic
 12  GPIO-controller properties as described in this bindings file.
 13
 14maintainers:
 15  - Hoan Tran <hoan@os.amperecomputing.com>
 16  - Serge Semin <fancer.lancer@gmail.com>
 17
 18properties:
 19  $nodename:
 20    pattern: "^gpio@[0-9a-f]+$"
 21
 22  compatible:
 23    const: snps,dw-apb-gpio
 24
 25  "#address-cells":
 26    const: 1
 27
 28  "#size-cells":
 29    const: 0
 30
 31  reg:
 32    maxItems: 1
 33
 34  clocks:
 35    minItems: 1
 36    items:
 37      - description: APB interface clock source
 38      - description: DW GPIO debounce reference clock source
 39
 40  clock-names:
 41    minItems: 1
 42    items:
 43      - const: bus
 44      - const: db
 45
 46  resets:
 47    maxItems: 1
 48
 49patternProperties:
 50  "^gpio-(port|controller)@[0-9a-f]+$":
 51    type: object
 52    properties:
 53      compatible:
 54        const: snps,dw-apb-gpio-port
 55
 56      reg:
 57        maxItems: 1
 58
 59      gpio-controller: true
 60
 61      '#gpio-cells':
 62        const: 2
 63
 64      gpio-line-names:
 65        minItems: 1
 66        maxItems: 32
 67
 68      gpio-ranges: true
 69
 70      ngpios:
 71        default: 32
 72        minimum: 1
 73        maximum: 32
 74
 75      snps,nr-gpios:
 76        description: The number of GPIO pins exported by the port.
 77        deprecated: true
 78        $ref: /schemas/types.yaml#/definitions/uint32
 79        default: 32
 80        minimum: 1
 81        maximum: 32
 82
 83      interrupts:
 84        description: |
 85          The interrupts to the parent controller raised when GPIOs generate
 86          the interrupts. If the controller provides one combined interrupt
 87          for all GPIOs, specify a single interrupt. If the controller provides
 88          one interrupt for each GPIO, provide a list of interrupts that
 89          correspond to each of the GPIO pins.
 90        minItems: 1
 91        maxItems: 32
 92
 93      interrupt-controller: true
 94
 95      '#interrupt-cells':
 96        const: 2
 97
 98    required:
 99      - compatible
100      - reg
101      - gpio-controller
102      - '#gpio-cells'
103
104    dependencies:
105      interrupt-controller: [ interrupts ]
106
107    additionalProperties: false
108
109additionalProperties: false
110
111required:
112  - compatible
113  - reg
114  - '#address-cells'
115  - '#size-cells'
116
117examples:
118  - |
119    gpio: gpio@20000 {
120      compatible = "snps,dw-apb-gpio";
121      reg = <0x20000 0x1000>;
122      #address-cells = <1>;
123      #size-cells = <0>;
124
125      porta: gpio-port@0 {
126        compatible = "snps,dw-apb-gpio-port";
127        reg = <0>;
128        gpio-controller;
129        #gpio-cells = <2>;
130        snps,nr-gpios = <8>;
131        interrupt-controller;
132        #interrupt-cells = <2>;
133        interrupt-parent = <&vic1>;
134        interrupts = <0>;
135      };
136
137      portb: gpio-port@1 {
138        compatible = "snps,dw-apb-gpio-port";
139        reg = <1>;
140        gpio-controller;
141        #gpio-cells = <2>;
142        snps,nr-gpios = <8>;
143      };
144    };
145...